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* Revert r92939. These intrinsics get matched to LLVM instructions,David Greene2010-01-071-24/+0
| | | | | | | so removing at Chris' request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92947 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some "missing" instrinsics to make the SSE intrinsic set a bit moreDavid Greene2010-01-071-0/+24
| | | | | | | orthogonal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92939 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the gcc builtins from the intrinsics, we'll lower themEric Christopher2009-12-011-2/+2
| | | | | | | explicitly so we can check arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90199 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommitting PALIGNR shift width fixes.Sean Callanan2009-11-201-2/+2
| | | | | | | | Thanks to Daniel Dunbar for fixing clang intrinsics: http://llvm.org/viewvc/llvm-project?view=rev&revision=89499 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting PALIGNR fix until I figure out how thisSean Callanan2009-11-201-2/+2
| | | | | | | broke the Clang testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed PALIGNR to take 8-bit rotations in all cases.Sean Callanan2009-11-201-2/+2
| | | | | | | | Also fixed the corresponding testcase, and the PALIGNR intrinsic (tested for correctness with llvm-gcc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR5315, original patch by Nicolas Capens!Eric Christopher2009-11-061-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
* Add sse4.2 string/text processing intrinsics. We'll select these later.Eric Christopher2009-08-141-0/+67
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79037 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace cleanup.Eric Christopher2009-08-141-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79036 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some cut and paste-os.Eric Christopher2009-08-081-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78493 91177308-0d34-0410-b5e6-96231b3b80d8
* Define intrinsics for crc instruction.Eric Christopher2009-08-081-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78482 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. LowerEric Christopher2009-07-291-0/+12
| | | | | | | to ptest instruction plus setcc. Revamp ptest instruction. Add test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77407 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove intrinsic support for __builtin_ia32_vec_set_v16qi andEric Christopher2009-07-221-6/+0
| | | | | | | | __builtin_ia32_vec_set_v4si as these should be lowered in the front-end to inserts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76714 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsic for __builtin_ia32_vec_set_v4si which turns out to beEric Christopher2009-07-211-0/+3
| | | | | | | pinsrd in sse4.1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76684 91177308-0d34-0410-b5e6-96231b3b80d8
* ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these ↵Evan Cheng2009-02-261-4/+4
| | | | | | intrinsics expect the high bits will not be modified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify the intrinsics pattern to separate out the "return" types from theBill Wendling2008-11-131-285/+286
| | | | | | | | | | | | "parameter" types. An intrinsic can now return a multiple return values like this: def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed pinsrd and pinsrq intrinsics because the code generator does not supportMon P Wang2008-10-151-6/+0
| | | | | | | them since they map to insert element git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57564 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix SSE4.1 roundss, roundsd. While the instructions have Dale Johannesen2008-10-101-2/+2
| | | | | | | | | | the same pattern as roundpd/roundps, the Intel compiler builtins do not: rounds* has an extra operand. Fixes gcc.target/i386/sse4_1-rounds[sd]-[1234].c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
* "The original bug was a complaint that _mm_srli_si128 mis-compiled when passedBill Wendling2008-10-021-0/+6
| | | | | | | | | | | a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the _mm_srli_si128 macro, and move the "* 8" from the macro into the compiler back-end. I can't change the existing __builtins because so many people are using them :-(." Patch by Stuart Hastings! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56944 91177308-0d34-0410-b5e6-96231b3b80d8
* SSE codegen for vsetcc nodesNate Begeman2008-07-171-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53719 91177308-0d34-0410-b5e6-96231b3b80d8
* Horizontal-add instructions are not commutative.Evan Cheng2008-06-161-8/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add "Commutative" property to intrinsics. This allows tblgen to generate ↵Evan Cheng2008-06-161-87/+129
| | | | | | | | | the commuted variants for dagisel matching code. - Mark lots of X86 intrinsics as "Commutative" to allow load folding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.Evan Cheng2008-05-241-11/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51533 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and ↵Evan Cheng2008-05-241-12/+0
| | | | | | x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51531 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into ↵Evan Cheng2008-05-241-6/+0
| | | | | | load and shuffle instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51521 91177308-0d34-0410-b5e6-96231b3b80d8
* Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This ↵Evan Cheng2008-05-031-6/+59
| | | | | | allow us to simplify the horribly complicated matching code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
* Undo 48570. Correctly match mmx shift instructions with an immediate operand.Evan Cheng2008-03-211-24/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsics to match mmx shift builtin's with immediate operand.Evan Cheng2008-03-191-0/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
* __builtin_ia32_movntdqa reads memoryNate Begeman2008-03-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48431 91177308-0d34-0410-b5e6-96231b3b80d8
* Missed one.Dale Johannesen2008-02-051-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46733 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not unconditionally redefine vec_ext_v16qi andDale Johannesen2008-02-041-2/+2
| | | | | | | | | | | vec_ext_v4si builtins. This is a hack; they should be defined here, then resolved in the X86 BE. However there is enough other stuff missing in the X86 BE for SSE41 that this will do for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46727 91177308-0d34-0410-b5e6-96231b3b80d8
* SSE 4.1 Intrinsics and detectionNate Begeman2008-02-031-0/+150
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix sse2.psrl.w and sse2.psrl.q definitions.Evan Cheng2008-01-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45772 91177308-0d34-0410-b5e6-96231b3b80d8
* remove attribution from a variety of miscellaneous files.Chris Lattner2007-12-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45425 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a few more missing gcc builtin's.Evan Cheng2007-12-211-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45278 91177308-0d34-0410-b5e6-96231b3b80d8
* Type specification didn't match gcc's.Evan Cheng2007-12-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45260 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove int_x86_sse2_movl_dq. It's replaced with a string compare.Evan Cheng2007-12-181-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45140 91177308-0d34-0410-b5e6-96231b3b80d8
* These have matching builtin's in 4.2.Evan Cheng2007-12-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45139 91177308-0d34-0410-b5e6-96231b3b80d8
* Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sureEvan Cheng2007-12-171-0/+2
| | | | | | | it's auto-upgraded to a shufflevector instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45131 91177308-0d34-0410-b5e6-96231b3b80d8
* __builtin_ia32_movqv4si is now expanded to a shuffle.Evan Cheng2007-12-151-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45057 91177308-0d34-0410-b5e6-96231b3b80d8
* All MMX shift instructions took a <2 x i32> vector as the shift amount ↵Anders Carlsson2007-12-141-8/+8
| | | | | | parameter. Change this to be <1 x i64> instead, which matches the assembler instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45027 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing SSE builtins: CVTPD2PI, CVTPS2PI,Dale Johannesen2007-10-301-0/+13
| | | | | | | | CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix argument types for PSLLQ, PSRLQ.Dale Johannesen2007-10-301-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43490 91177308-0d34-0410-b5e6-96231b3b80d8
* There is no {rsqrt,rcp}{p,s}d.Dan Gohman2007-09-211-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42190 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding SSSE3 intrinsics.Bill Wendling2007-08-101-2/+116
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing SSE builtins:Bill Wendling2007-07-231-0/+14
| | | | | | | | | | | | __builtin_ia32_cvtss2si64 __builtin_ia32_cvttss2si64 __builtin_ia32_cvtsi642ss __builtin_ia32_cvtsd2si64 __builtin_ia32_cvttsd2si64 __builtin_ia32_cvtsi642sd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8
* add missing mmx intrinsicChris Lattner2007-05-161-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37099 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the final MMX instructions. Correct a few wrong patterns.Bill Wendling2007-04-241-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36405 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for our first SSSE3 instruction "pmulhrsw".Bill Wendling2007-04-101-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding more MMX instructions.Bill Wendling2007-04-031-0/+41
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
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