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| * ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-221-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Back in the mists of time (2008), it seems TableGen couldn't handle the patterns necessary to match ARM's CMOV node that we convert select operations to, so we wrote a lot of fairly hairy C++ to do it for us. TableGen can deal with it now: there were a few minor differences to CodeGen (see tests), but nothing obviously worse that I could see, so we should probably address anything that *does* come up in a localised manner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188995 91177308-0d34-0410-b5e6-96231b3b80d8
| * [SystemZ] Use SRST to optimize memchrRichard Sandiford2013-08-202-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
| * [SystemZ] Use SRST to implement strlen and strnlenRichard Sandiford2013-08-162-1/+14
| | | | | | | | | | | | | | It would also make sense to use it for memchr; I'm working on that now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8
| * [SystemZ] Use MVST to implement strcpy and stpcpyRichard Sandiford2013-08-162-1/+17
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8
| * [SystemZ] Use CLST to implement strcmpRichard Sandiford2013-08-162-1/+15
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8
| * Update makeLibCall to return both the call and the chain associated with the ↵Michael Gottesman2013-08-131-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libcall instead of just the call. This allows us to specify libcalls that return void. LowerCallTo returns a pair with the return value of the call as the first element and the chain associated with the return value as the second element. If we lower a call that has a void return value, LowerCallTo returns an SDValue with a NULL SDNode and the chain for the call. Thus makeLibCall by just returning the first value makes it impossible for you to set up the chain so that the call is not eliminated as dead code. I also updated all references to makeLibCall to reflect the new return type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188300 91177308-0d34-0410-b5e6-96231b3b80d8
| * [SystemZ] Use CLC and IPM to implement memcmpRichard Sandiford2013-08-121-0/+14
| | | | | | | | | | | | | | | | For now this is restricted to fixed-length comparisons with a length in the range [1, 256], as for memcpy() and MVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add a overload to CostTable which allows it to infer the size of the table.Benjamin Kramer2013-08-091-9/+26
| | | | | | | | | | | | | | | | Use it to avoid repeating ourselves too often. Also store MVT::SimpleValueType in the TTI tables so they can be statically initialized, MVT's constructors create bloated initialization code otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188095 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add ISD::FROUND for libm round()Hal Finkel2013-08-072-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All libm floating-point rounding functions, except for round(), had their own ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm adding ISD::FROUND so that round() can be custom lowered as well. For the most part, this is straightforward. I've added an intrinsic and a matching ISD node just like those for nearbyint() and friends. The SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed fround). This will be used by the PowerPC backend in a follow-up commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187926 91177308-0d34-0410-b5e6-96231b3b80d8
* | Fixes for LLDB build to work around host 4.6.2+ compiler issues.Todd Fiala2013-11-051-0/+53
|/ | | | | | | | | | | | These fixes to the LLVM source add manual copy constructor and operator=() methods for classes that use member bitfields and are used in templated containers. The intent is to keep this change (and related LLDB and clang changes) local to android only until we either fix the compiler or use a new one for host executable builds. Change-Id: I8c6b31be0b3cfc79cb89b591c41cbbfdf0157c6c
* Refactor isInTailCallPosition handlingTim Northover2013-08-061-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change came about primarily because of two issues in the existing code. Niether of: define i64 @test1(i64 %val) { %in = trunc i64 %val to i32 tail call i32 @ret32(i32 returned %in) ret i64 %val } define i64 @test2(i64 %val) { tail call i32 @ret32(i32 returned undef) ret i32 42 } should be tail calls, and the function sameNoopInput is responsible. The main problem is that it is completely symmetric in the "tail call" and "ret" value, but in reality different things are allowed on each side. For these cases: 1. Any truncation should lead to a larger value being generated by "tail call" than needed by "ret". 2. Undef should only be allowed as a source for ret, not as a result of the call. Along the way I noticed that a mismatch between what this function treats as a valid truncation and what the backends see can lead to invalid calls as well (see x86-32 test case). This patch refactors the code so that instead of being based primarily on values which it recurses into when necessary, it starts by inspecting the type and considers each fundamental slot that the backend will see in turn. For example, given a pathological function that returned {{}, {{}, i32, {}}, i32} we would consider each "real" i32 in turn, and ask if it passes through unchanged. This is much closer to what the backend sees as a result of ComputeValueVTs. Aside from the bug fixes, this eliminates the recursion that's going on and, I believe, makes the bulk of the code significantly easier to understand. The trade-off is the nasty iterators needed to find the real types inside a returned value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187787 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Add getVectorIdxTy() function v2Tom Stellard2013-08-051-0/+7
| | | | | | | | | | | | | | | | | | | | | This virtual function can be implemented by targets to specify the type to use for the index operand of INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT, INSERT_SUBVECTOR, EXTRACT_SUBVECTOR. The default implementation returns the result from TargetLowering::getPointerTy() The previous code was using TargetLowering::getPointerTy() for vector indices, because this is guaranteed to be legal on all targets. However, using TargetLowering::getPointerTy() can be a problem for targets with pointer sizes that differ across address spaces. On such targets, when vectors need to be loaded or stored to an address space other than the default 'zero' address space (which is the address space assumed by TargetLowering::getPointerTy()), having an index that is a different size than the pointer can lead to inefficient pointer calculations, (e.g. 64-bit adds for a 32-bit address space). There is no intended functionality change with this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187748 91177308-0d34-0410-b5e6-96231b3b80d8
* Use function attributes to indicate that we don't want to realign the stack.Bill Wendling2013-08-011-6/+1
| | | | | | | | | Function attributes are the future! So just query whether we want to realign the stack directly from the function instead of through a random target options structure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187618 91177308-0d34-0410-b5e6-96231b3b80d8
* Moving definition of MnemonicContainsDot field from class Instruction to ↵Vladimir Medic2013-08-011-3/+3
| | | | | | class AsmParser as suggested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187569 91177308-0d34-0410-b5e6-96231b3b80d8
* Use proper section suffix for COFF weak symbolsNico Rieck2013-07-291-2/+3
| | | | | | | | | 32-bit symbols have "_" as global prefix, but when forming the name of COMDAT sections this prefix is ignored. The current behavior assumes that this prefix is always present which is not the case for 64-bit and names are truncated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187356 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a comment cut-&-pasto.Richard Sandiford2013-07-251-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187117 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace the "NoFramePointerElimNonLeaf" target option with a function attribute.Bill Wendling2013-07-251-7/+1
| | | | | | | | | There's no need to specify a flag to omit frame pointer elimination on non-leaf nodes...(Honestly, I can't parse that option out.) Use the function attribute stuff instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187093 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)FreeTom Stellard2013-07-231-2/+4
| | | | | | | This commit also implements these functions for R600 and removes a test case that was relying on the buggy behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommit r186217 with testcase fix:Bill Wendling2013-07-221-6/+1
| | | | | | | | | | | Use the function attributes to pass along the stack protector buffer size. Now that we have robust function attributes, don't use a command line option to specify the stack protecto buffer size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186863 91177308-0d34-0410-b5e6-96231b3b80d8
* Treat nothrow forms of ::operator delete and ::operator delete[] asRichard Smith2013-07-211-0/+4
| | | | | | | deallocation functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186798 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch allows targets to define weather the instruction mnemonics in asm ↵Vladimir Medic2013-07-161-0/+3
| | | | | | matcher tables will contain '.' character. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186388 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert commit r186217 -- this is breaking bots:Chandler Carruth2013-07-131-1/+6
| | | | | | | | | | http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/4328 Original commit log: Use the function attributes to pass along the stack protector buffer size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186234 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the function attributes to pass along the stack protector buffer size.Bill Wendling2013-07-121-6/+1
| | | | | | | | Now that we have robust function attributes, don't use a command line option to specify the stack protecto buffer size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186217 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed up comments in TargetLowering.h to conform to the LLVM Style Guide.Michael Gottesman2013-07-111-682/+613
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186121 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and allStephen Lin2013-07-091-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in order to resolve the following issues with fmuladd (i.e. optional FMA) intrinsics: 1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd intrinsics even if the subtarget does not support FMA instructions, leading to laughably bad code generation in some situations. 2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128, resulting in a call to a software fp128 FMA implementation. 3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize, etc. to types that support hardware FMAs. The function has also been slightly renamed for consistency and to force a merge/build conflict for any out-of-tree target implementing it. To resolve, see comments and fixed in-tree examples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Remove no-op MVCsRichard Sandiford2013-07-051-0/+8
| | | | | | | | | | | | The stack coloring pass has code to delete stores and loads that become trivially dead after coloring. Extend it to cope with single instructions that copy from one frame index to another. The testcase happens to show an example of this kicking in at the moment. It did occur in Real Code too though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185705 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Clean up register scavenging codeRichard Sandiford2013-07-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SystemZ wants normal register scavenging slots, as close to the stack or frame pointer as possible. The only reason it was using custom code was because PrologEpilogInserter assumed an x86-like layout, where the frame pointer is at the opposite end of the frame from the stack pointer. This meant that when frame pointer elimination was disabled, the slots ended up being as close as possible to the incoming stack pointer, which is the opposite of what we want on SystemZ. This patch adds a new knob to say which layout is used and converts SystemZ to use target-independent scavenging slots. It's one of the pieces needed to support frame-to-frame MVCs, where two slots might be required. The ABI requires us to allocate 160 bytes for calls, so one approach would be to use that area as temporary spill space instead. It would need some surgery to make sure that the slot isn't live across a call though. I stuck to the "isFPCloseToIncomingSP - ..." style comment on the "do what the surrounding code does" principle. The FP case is already covered by several Systemz/frame-* tests, which fail without the PrologueEpilogueInserter change, so no new ones are needed. No behavioural change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185696 91177308-0d34-0410-b5e6-96231b3b80d8
* Added posix function gettimeofday to LibFunc::Func for all platforms but ↵Michael Gottesman2013-07-031-0/+2
| | | | | | | | | | | Windows. *NOTE* In a recent version of posix, they added the restrict keyword to the arguments for this function. From some spelunking it seems that on some platforms, the call has restrict on its arguments and others it does not. Thus I left off the restrict keyword from the function prototype in the comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185501 91177308-0d34-0410-b5e6-96231b3b80d8
* [DebugInfo] Allow getDebugThreadLocalSymbol to return MCExprUlrich Weigand2013-07-021-1/+1
| | | | | | | | | | | | | This allows getDebugThreadLocalSymbol to return a generic MCExpr instead of just a MCSymbolRefExpr. This is in preparation for supporting debug info for TLS variables on PowerPC, where we need to describe the variable location using a more complex expression than just MCSymbolRefExpr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185460 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: PR14728: TLS supportDavid Blaikie2013-06-281-0/+4
| | | | | | | | | | | | | | Based on GCC's output for TLS variables (OP_constNu, x@dtpoff, OP_lo_user), this implements debug info support for TLS in ELF. Verified that this output is correct/sufficient on Linux (using gold - if you're using binutils-ld, you'll need something with the fix for http://sourceware.org/bugzilla/show_bug.cgi?id=15685 in it). Support on non-ELF is sort of "arbitrary" at the moment - if Apple folks want to discuss (or just go ahead & implement) how this should work in MachO, etc, I'm open. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185203 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Generate a function for getting operand indices based on their ↵Tom Stellard2013-06-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defined names This patch modifies TableGen to generate a function in ${TARGET}GenInstrInfo.inc called getNamedOperandIdx(), which can be used to look up indices for operands based on their names. In order to activate this feature for an instruction, you must set the UseNamedOperandTable bit. For example, if you have an instruction like: def ADD : TargetInstr <(outs GPR:$dst), (ins GPR:$src0, GPR:$src1)>; You can look up the operand indices using the new function, like this: Target::getNamedOperandIdx(Target::ADD, Target::OpName::dst) => 0 Target::getNamedOperandIdx(Target::ADD, Target::OpName::src0) => 1 Target::getNamedOperandIdx(Target::ADD, Target::OpName::src1) => 2 The operand names are case sensitive, so $dst and $DST are considered different operands. This change is useful for R600 which has instructions with a large number of operands, many of which model single bit instruction configuration values. These configuration bits are common across most instructions, but may have a different operand index depending on the instruction type. It is useful to have a convenient way to look up the operand indices, so these bits can be generically set on any instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184879 91177308-0d34-0410-b5e6-96231b3b80d8
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove static, because it was messing everything up.Bill Wendling2013-06-201-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184400 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the '==' operator inline.Bill Wendling2013-06-191-2/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184375 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this static inline to avoid duplicates.Bill Wendling2013-06-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184374 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the comparison operators non-member functions.Bill Wendling2013-06-191-5/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184373 91177308-0d34-0410-b5e6-96231b3b80d8
* Add operator!= as the compliment to operator==. This is for a future change.Bill Wendling2013-06-191-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184348 91177308-0d34-0410-b5e6-96231b3b80d8
* Directly access objects which may change during compilation.Bill Wendling2013-06-171-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184121 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE ↵David Blaikie2013-06-161-16/+0
| | | | | | | | | | MachineInstrs Frame index handling is now target-agnostic, so delete the target hooks for creation & asm printing of target-specific addressing in DBG_VALUEs and any related functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184067 91177308-0d34-0410-b5e6-96231b3b80d8
* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-151-0/+1
| | | | | | And add Sandybridge/Haswell resource buffers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184034 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-152-8/+8
| | | | | | | | | | | | | Replace the ill-defined MinLatency and ILPWindow properties with with straightforward buffer sizes: MCSchedMode::MicroOpBufferSize MCProcResourceDesc::BufferSize These can be used to more precisely model instruction execution if desired. Disabled some misched tests temporarily. They'll be reenabled in a few commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid warnings about unused parameters that tend to come up a lot whenDuncan Sands2013-06-102-13/+13
| | | | | | | | building outside projects with a different compiler than that used to build LLVM itself (eg switching between gcc and clang). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183650 91177308-0d34-0410-b5e6-96231b3b80d8
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-311-2/+7
| | | | | | | | This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
* Loop Strength Reduce: Scaling factor cost.Quentin Colombet2013-05-311-0/+12
| | | | | | | | | | | | | Account for the cost of scaling factor in Loop Strength Reduce when rating the formulae. This uses a target hook. The default implementation of the hook is: if the addressing mode is legal, the scaling factor is free. <rdar://problem/13806271> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183045 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-311-2/+17
| | | | | | | | | | | | | | | NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change the instances of SubRegIndex that have a comps template arg to use the ComposedSubRegIndex class instead. In TableGen land, this adds Size and Offset attributes to SubRegIndex, and the ComposedSubRegIndex class, for which the Size and Offset are computed by TableGen. This also adds an accessor in MCRegisterInfo, and Size/Offsets for the X86 and ARM subreg indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183020 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't reach into the middle of TargetMachine and cache one of its ivars.Bill Wendling2013-05-291-6/+7
| | | | | | | Not only does this break encapsulation, it's gross. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182876 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert sqrt functions into sqrt instructions when -ffast-math is in effect.Preston Gurd2013-05-271-0/+8
| | | | | | | | | | | | | | | | When -ffast-math is in effect (on Linux, at least), clang defines __FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the preprocessor to include <bits/math-finite.h>, which renames the sqrt functions. For instance, "sqrt" is renamed as "__sqrt_finite". This patch adds the 3 new names in such a way that they will be treated as equivalent to their respective original names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182739 91177308-0d34-0410-b5e6-96231b3b80d8
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-252-14/+13
| | | | | | | Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
* Create an FPOW SDNode opcode def in the target independent .td file rather ↵Owen Anderson2013-05-221-0/+1
| | | | | | than in a specific backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182450 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
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