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* Replace TargetInstrInfo::isInvariantLoad and its target-specificDan Gohman2009-10-072-10/+8
| | | | | | | | | | implementations with a new MachineInstr::isInvariantLoad, which uses MachineMemOperands and is target-independent. This brings MachineLICM and other functionality to targets which previously lacked an isInvariantLoad implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-072-3/+10
| | | | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment explaining how DenseMap::insert works, because it is notEdwin Török2009-10-071-0/+3
| | | | | | | | | | intuitive. It does NOT update the value if the key is already in the map, it also returns false if the key is already in the map, regardless if the value matched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83458 91177308-0d34-0410-b5e6-96231b3b80d8
* Make getPointerTo return a const PointerType* rather thanDuncan Sands2009-10-071-1/+1
| | | | | | | an unqualified PointerType* because it seems more correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83454 91177308-0d34-0410-b5e6-96231b3b80d8
* INTRINSIC_W_CHAIN and INTRINSIC_VOID do not use MemSDNode. TheyDan Gohman2009-10-071-2/+0
| | | | | | | may access memory, but they don't carry a MachineMemOperand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83449 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support to handle debug info attached to an instruction.Devang Patel2009-10-061-1/+2
| | | | | | | This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83400 91177308-0d34-0410-b5e6-96231b3b80d8
* Make LLVMContext's pImpl member const.Dan Gohman2009-10-061-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83393 91177308-0d34-0410-b5e6-96231b3b80d8
* remove predicate simplifier, it never got the last bugs beatenChris Lattner2009-10-062-8/+0
| | | | | | | | | out of it, and jump threading, condprop and gvn are now getting most of the benefit. This was approved by Nicholas and Nicolas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83390 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce and use convenience methods for getting pointer typesDuncan Sands2009-10-061-0/+15
| | | | | | | | where the element is of a basic builtin type. For example, to get an i8* use getInt8PtrTy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83379 91177308-0d34-0410-b5e6-96231b3b80d8
* Update processDebugLoc() so that it can be used to process debug info before ↵Devang Patel2009-10-062-4/+4
| | | | | | and after printing an instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83363 91177308-0d34-0410-b5e6-96231b3b80d8
* In Thumb1, the register scavenger is not always able to use an emergencyJim Grosbach2009-10-051-0/+18
| | | | | | | | | | spill slot. When frame references are via the frame pointer, they will be negative, but Thumb1 load/store instructions only allow positive immediate offsets. Instead, Thumb1 will spill to R12. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83336 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an unnnecessary LLVMContext argument inDan Gohman2009-10-051-2/+1
| | | | | | | ConstantFoldLoadThroughGEPConstantExpr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83311 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a name in a comment.Dan Gohman2009-10-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83306 91177308-0d34-0410-b5e6-96231b3b80d8
* add more type predicates.Chris Lattner2009-10-051-6/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83296 91177308-0d34-0410-b5e6-96231b3b80d8
* add some helper functions.Chris Lattner2009-10-051-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83293 91177308-0d34-0410-b5e6-96231b3b80d8
* remove llvm-db: it is completely broken and if anyone wants to do a debugger,Chris Lattner2009-10-056-887/+0
| | | | | | | they should not base it on llvm-db (which not following almost any "best practices"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83288 91177308-0d34-0410-b5e6-96231b3b80d8
* Do away with the strange use of BitVectors in SSI, and just use normal sets. ↵Owen Anderson2009-10-041-19/+11
| | | | | | This makes the code much more C++/LLVM-ish. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83286 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename enum NumOccurrences to NumOccurrencesFlag since there is a member ↵Evan Cheng2009-10-041-6/+8
| | | | | | named NumOccurrences. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83273 91177308-0d34-0410-b5e6-96231b3b80d8
* Renamed MachineInstrIndex to LiveIndex.Lang Hames2009-10-032-138/+138
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand api out in the usual inserter way, though, I do have aMike Stump2009-10-011-1/+6
| | | | | | | | question, can we get rid of the BasicBlock versions of all inserters and use Head == 0 to indicate the old case when GetInsertBlock == 0? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83216 91177308-0d34-0410-b5e6-96231b3b80d8
* remove trailing whitespaceJim Grosbach2009-10-011-19/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83213 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use identifiers that start with an underscore followedDan Gohman2009-10-011-2/+2
| | | | | | | by a capital letter, which invokes undefined behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83206 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach CMake to look for bidirectional_iterator, iterator, forward_iterator, ↵Douglas Gregor2009-10-011-5/+2
| | | | | | uint64_t, and u_int64_t, from Yonggang Luo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83203 91177308-0d34-0410-b5e6-96231b3b80d8
* Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. WhenEvan Cheng2009-10-012-1/+25
| | | | | | | | | | | set, these flags indicate the instructions source / def operands have special register allocation requirement that are not captured in their register classes. Post-allocation passes (e.g. post-alloc scheduler) should not change their allocations. e.g. ARM::LDRD require the two definitions to be allocated even / odd register pair. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83196 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the GVNPRE pass. It has been subsumed by the GVN pass.Chris Lattner2009-10-012-8/+0
| | | | | | | | Ok'd by Owen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83193 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another MDNode into DebugLocTuple. This will be used to keep track of ↵Devang Patel2009-10-011-6/+10
| | | | | | inlined functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83190 91177308-0d34-0410-b5e6-96231b3b80d8
* If location info is attached with an instruction then keep track of alloca ↵Devang Patel2009-10-011-0/+14
| | | | | | slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MachineInstr as an processDebugLoc() argument.Devang Patel2009-09-301-1/+1
| | | | | | | This will allow processDebugLoc() to handle scopes for DWARF debug info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83183 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MDNode * directly as an RecordSourceLine() argument.Devang Patel2009-09-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Devang Patel2009-09-301-6/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83181 91177308-0d34-0410-b5e6-96231b3b80d8
* Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.Devang Patel2009-09-301-2/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83180 91177308-0d34-0410-b5e6-96231b3b80d8
* Use OutStreamer.SwitchSection instead of writing out textual section directives.Bob Wilson2009-09-301-1/+7
| | | | | | | | Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to get access to that section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83178 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use thisBob Wilson2009-09-301-0/+4
| | | | | | | | | | | | | | | | | to emit target-specific things at the beginning of the asm output. This fixes a problem for PPC, where the text sections are not being kept together as expected. The base class doInitialization code calls DW->BeginModule() which emits a bunch of DWARF section directives. The PPC doInitialization code then emits all the TEXT section directives, with the intention that they will be kept together. But as I understand it, the Darwin assembler treats the default TEXT section as a special case and moves it to the beginning of the file, which means that all those DWARF sections are in the middle of the text. With this change, the EmitStartOfAsmFile hook is called before the DWARF section directives are emitted, so that all the PPC text section directives come out right at the beginning of the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83176 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix integer overflow in instruction scheduling. This can happen if we haveReid Kleckner2009-09-301-4/+4
| | | | | | | | | | | basic blocks that are so long that their size overflows a short. Also assert that overflow does not happen in the future, as requested by Evan. This fixes PR4401. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence unused variable warning.Devang Patel2009-09-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83151 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a target hook to add pre- post-regalloc scheduling passes.Evan Cheng2009-09-301-4/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83144 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify.Devang Patel2009-09-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83123 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove -post-RA-schedule flag and add a TargetSubtarget method to enable ↵David Goodwin2009-09-301-1/+5
| | | | | | post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
* Forward-declare ValueSymbolTable so that SymbolTableListTraits.h can be ↵Douglas Gregor2009-09-301-1/+2
| | | | | | parsed by itself git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83121 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a way for a frontend to generate more complex dwarf locationMike Stump2009-09-301-4/+25
| | | | | | | | | | | | | | | | | | | information. This allows arbitrary code involving DW_OP_plus_uconst and DW_OP_deref. The scheme allows for easy extention to include, any, or all of the DW_OP_ opcodes. I thought about just exposing all of them, but, wasn't sure if people wanted the dwarf opcodes exposed in the api. Is that a layering violation? With this scheme, the entire existing block scheme used by llvm-gcc can be switched over to the new scheme. I think that would be cleaner, as then the compiler specific bits are not present in llvm proper. Before the old code can be yanked however, similar code in clang would have to be removed. Next up, more testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83120 91177308-0d34-0410-b5e6-96231b3b80d8
* Add removeMD().Devang Patel2009-09-291-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83107 91177308-0d34-0410-b5e6-96231b3b80d8
* Only one custom meadata of each kind can be attached with an instruction.Devang Patel2009-09-292-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83105 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove std::string uses from DebugInfo interface.Devang Patel2009-09-291-93/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83083 91177308-0d34-0410-b5e6-96231b3b80d8
* Create empty StringRef is incoming cstring is NULL.Devang Patel2009-09-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83082 91177308-0d34-0410-b5e6-96231b3b80d8
* Parse custom metadata attached with an instruction.Devang Patel2009-09-291-2/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83033 91177308-0d34-0410-b5e6-96231b3b80d8
* s/class Metadata/class MetadataContext/gDevang Patel2009-09-283-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83019 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not use global typedef for MDKindID.Devang Patel2009-09-282-10/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83016 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary include.Devang Patel2009-09-281-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83013 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen2009-09-282-3/+6
| | | | | | | | | | unused DECLARE instruction. KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF in the places where IMPLICIT_DEF is just used to alter liveness of physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert LoopSimplify and LoopExtractor from FunctionPass to LoopPass.Dan Gohman2009-09-282-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82990 91177308-0d34-0410-b5e6-96231b3b80d8
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