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path: root/lib/CodeGen/CalcSpillWeights.cpp
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* Avoid iterating with LiveIntervals::iterator.Jakob Stoklund Olesen2012-06-201-9/+11
| | | | | | | | | | That is a DenseMap iterator keyed by pointers, so the iteration order is nondeterministic. I would like to replace the DenseMap with an IndexedMap which doesn't allow iteration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158856 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop using LiveIntervals::isReMaterializable().Jakob Stoklund Olesen2012-06-051-9/+24
| | | | | | | | | | It is an old function that does a lot more than required by CalcSpillWeights, which was the only remaining caller. The isRematerializable() function never actually sets the isLoad argument, so don't try to compute that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157973 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen2011-08-091-32/+0
| | | | | | | | This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't inflate register classes used by inline asm.Jakob Stoklund Olesen2011-07-011-0/+3
| | | | | | | | | | | | The constraints are represented by the register class of the original virtual register created for the inline asm. If the register class were included in the operand descriptor, we might be able to do this. For now, just give up on regclass inflation when inline asm is involved. No test case, this bug hasn't happened yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226 91177308-0d34-0410-b5e6-96231b3b80d8
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-271-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach LiveInterval::isZeroLength about null SlotIndexes.Jakob Stoklund Olesen2011-05-161-1/+1
| | | | | | | | | | | | When instructions are deleted, they leave tombstone SlotIndex entries. The isZeroLength method should ignore these null indexes. This causes RABasic to sometimes spill a callee-saved register in the abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing register allocation according to spill weight can cause more registers to be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new TRI->getLargestLegalSuperClass hook to constrain register class ↵Jakob Stoklund Olesen2011-04-261-50/+29
| | | | | | | | | | inflation. This has two effects: 1. We never inflate to a larger register class than what the sub-target can handle. 2. Completely unconstrained virtual registers get the largest possible register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130229 91177308-0d34-0410-b5e6-96231b3b80d8
* Recompute register class and hint for registers created during spilling.Jakob Stoklund Olesen2011-03-291-18/+28
| | | | | | The spill weight is not recomputed for an unspillable register - it stays infinite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128490 91177308-0d34-0410-b5e6-96231b3b80d8
* Make SpillIs an optional pointer. Avoid creating a bunch of temporary ↵Jakob Stoklund Olesen2011-03-101-2/+1
| | | | | | SmallVectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127388 91177308-0d34-0410-b5e6-96231b3b80d8
* Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen2011-02-141-2/+1
| | | | | | | | | | Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125530 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen2011-01-091-2/+2
| | | | | | | | | | without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-121-1/+5
| | | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up debug output.Jakob Stoklund Olesen2010-08-121-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110940 91177308-0d34-0410-b5e6-96231b3b80d8
* Give up on register class recalculation when the register is used with subregJakob Stoklund Olesen2010-08-101-1/+10
| | | | | | | operands. We don't currently have a hook to provide "the largest super class of A where all registers' getSubReg(subidx) is valid and in B". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110730 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement register class inflation.Jakob Stoklund Olesen2010-08-101-0/+41
| | | | | | | | | When splitting a live range, the new registers have fewer uses and the permissible register class may be less constrained. Recompute the register class constraint from the uses of new registers created for a split. This may let them be allocated from a larger set, possibly avoiding a spill. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110703 91177308-0d34-0410-b5e6-96231b3b80d8
* Transpose the calculation of spill weights such that we are calculating oneJakob Stoklund Olesen2010-08-101-98/+127
| | | | | | | | | | | | | | register at a time. This turns out to be slightly faster than iterating over instructions, but more importantly, it allows us to compute spill weights for new registers created after the spill weight pass has run. Also compute the allocation hint at the same time as the spill weight. This allows us to use the spill weight as a cost metric for copies, and choose the most profitable hint if there is more than one possibility. The new hints provide a very small (< 0.1%) but universal code size improvement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110631 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove remaining calls to TII::isMoveInstr.Jakob Stoklund Olesen2010-07-161-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108556 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Eric Christopher2010-07-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107556 91177308-0d34-0410-b5e6-96231b3b80d8
* Always normalize spill weights, also for intervals created by spilling.Jakob Stoklund Olesen2010-02-181-4/+1
| | | | | | | | | | | | | | Moderate the weight given to very small intervals. The spill weight given to new intervals created when spilling was not normalized in the same way as the original spill weights calculated by CalcSpillWeights. That meant that restored registers would tend to hang around because they had a much higher spill weight that unspilled registers. This improves the runtime of a few tests by up to 10%, and there are no significant regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove duplicated #include.Evan Cheng2010-02-101-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95747 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit an error for illegal inline asm constraint (which uses illegal type) ↵Evan Cheng2010-02-101-0/+1
| | | | | | rather than asserting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95746 91177308-0d34-0410-b5e6-96231b3b80d8
* fix missing #includes.Chris Lattner2010-02-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95745 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-7/+1
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip DEBUG_VALUE in some places where it was affecting codegen.Dale Johannesen2010-02-091-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95647 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2009-12-241-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92099 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames2009-12-221-1/+1
| | | | | | | This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91859 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved spill weight calculation out of SimpleRegisterCoalescing and into its ↵Lang Hames2009-12-141-0/+154
own pass: CalculateSpillWeights. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91273 91177308-0d34-0410-b5e6-96231b3b80d8
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