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* Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng2010-03-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite handling of DBG_VALUE; previous algorithmDale Johannesen2010-02-121-16/+24
| | | | | | | | | | | | | didn't handle X = Y<dead> = use X DBG_VALUE(X) I was hoping to avoid this approach as it's slower, but I don't think it can be done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95996 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow for more than one DBG_VALUE targeting theDale Johannesen2010-02-111-4/+4
| | | | | | | | same dead instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95890 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete dead PHI machine instructions. These can be created due to typeBob Wilson2010-02-101-1/+1
| | | | | | | | | | legalization even when the IR-level optimizer has removed dead phis, such as when the high half of an i64 value is unused on a 32-bit target. I had to adjust a few test cases that had dead phis. This is a partial fix for Radar 7627077. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95816 91177308-0d34-0410-b5e6-96231b3b80d8
* more comment updatesDale Johannesen2010-02-101-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95736 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-1/+1
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng2010-02-061-0/+5
| | | | | | | | | | | only run for x86 with fastisel. I've found it being very effective in eliminating some obvious dead code as result of formal parameter lowering especially when tail call optimization eliminated the need for some of the loads from fixed frame objects. It also shrinks a number of the tests. A couple of tests no longer make sense and are now eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
* If the only use of something is a DEBUG_VALUE, don'tDale Johannesen2010-01-271-0/+14
| | | | | | | | | let that stop it from being deleted, and change the DEBUG_VALUE value to undef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94694 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92496 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | | VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-2/+1
| | | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-1/+1
| | | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79748 91177308-0d34-0410-b5e6-96231b3b80d8
* Add const qualifiers.Dan Gohman2009-08-111-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78663 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename AliasSet to SubRegs, to reflect changes in the surrounding code.Dan Gohman2008-10-161-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57618 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a subtle bug in DeadMachineInstructionElim's livenessDan Gohman2008-10-161-1/+4
| | | | | | | | computation. A def of a register doesn't necessarily kill live super-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57614 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-3/+3
| | | | | | | isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
* Add debug output to this pass.Dan Gohman2008-09-251-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56602 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the logic for testing if an instruction is dead into aDan Gohman2008-09-241-37/+48
| | | | | | | separate method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56531 91177308-0d34-0410-b5e6-96231b3b80d8
* Set SetStore to false, to allow this pass to deleteDan Gohman2008-09-241-1/+2
| | | | | | | dead loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56529 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that DeadMachineInstructionElim is basically workingDan Gohman2008-09-231-6/+0
| | | | | | | | correctly, it's not necessary to explicitly remove registers from their use-def lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56509 91177308-0d34-0410-b5e6-96231b3b80d8
* Track local physical register liveness. This is not the mostDan Gohman2008-09-231-3/+53
| | | | | | | | efficient implementation possible, but it's pretty simple and good enough for the time being. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56504 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't consider instructions with implicit physical registerDan Gohman2008-09-181-1/+2
| | | | | | | defs to be necessarily live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman2008-09-171-0/+99
be used with fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
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