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* Teach LowerSubregs to preserve kill/dead information when loweringDan Gohman2008-12-181-1/+63
| | | | | | | subreg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61220 91177308-0d34-0410-b5e6-96231b3b80d8
* Make LowerSubregs' debug output for EXTRACT_SUBREG consistent withDan Gohman2008-12-181-1/+6
| | | | | | | that of INSERT_SUBREG and SUBREG_TO_REG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61218 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a copy+pasto in an assertion message.Dan Gohman2008-12-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61217 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix indentation level.Dan Gohman2008-12-181-33/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61216 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence unused variable warnings.Devang Patel2008-11-211-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59841 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-11/+11
| | | | | | | isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
* Give LowerSubregs.cpp a top-level description.Dan Gohman2008-09-241-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56596 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of setPreservesAll, just mark them preseving machine loop info and ↵Evan Cheng2008-09-221-1/+2
| | | | | | machine dominators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56475 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark several codegen passes as preserving all analysis.Evan Cheng2008-09-221-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56469 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix indentation.Dan Gohman2008-08-201-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55049 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-enable elimination of unnecessary SUBREG_TO_REG instructions inDan Gohman2008-08-071-4/+9
| | | | | | | | | | | | LowerSubregs, and fix an x86-64 isel bug that this exposed. SUBREG_TO_REG for x86-64 implicit zero extension is only safe for isel to generate when the source is known to always have zeros in the high 32 bits. The EXTRACT_SUBREG instruction does not clear the high 32 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman2008-07-171-3/+3
| | | | | | | | Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53746 91177308-0d34-0410-b5e6-96231b3b80d8
* It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. ↵Evan Cheng2008-06-171-11/+6
| | | | | | movl %eax, %eax on x86-64 actually does a zero-extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52421 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not issue identity copies.Evan Cheng2008-06-161-13/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52373 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert this.Evan Cheng2008-06-041-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51949 91177308-0d34-0410-b5e6-96231b3b80d8
* LowerSubregs should not clobber any analysis.Evan Cheng2008-06-041-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51933 91177308-0d34-0410-b5e6-96231b3b80d8
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-161-94/+61
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-131-10/+14
| | | | | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb2008-03-111-23/+12
| | | | | | failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.Evan Cheng2008-03-111-21/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48221 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-12/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-101-23/+12
| | | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-25/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-4/+6
| | | | | | | Machine-level API cleanup instigated by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-5/+5
| | | | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
* isSubRegOf() is a dup of isSubRegister.Evan Cheng2007-10-231-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43249 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+4
| | | | | | | Tested with "make check"! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-3/+3
| | | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
* Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵Christopher Lamb2007-08-101-17/+24
| | | | | | LowerSubregs and add more debugging output there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41005 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement review feedback. No functionality change.Christopher Lamb2007-08-061-137/+152
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40863 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a MachineFunction pass, which runs post register allocation, that turns ↵Christopher Lamb2007-07-261-0/+226
subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8
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