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* Optionally create a MachineInstr without default implicit operands.Evan Cheng2007-10-131-4/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42945 91177308-0d34-0410-b5e6-96231b3b80d8
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-0/+18
| | | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-7/+7
| | | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove spurious consts. This fixes warnings with compilers thatDan Gohman2007-09-141-1/+1
| | | | | | | are strict about such things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41956 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove subreg index from MachineInstr's and also keep vregs as unsigned when ↵Christopher Lamb2007-07-261-2/+0
| | | | | | adding operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40514 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineInstr::isPredicable() is no longer needed.Evan Cheng2007-06-151-4/+0
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* Add missing const qualifiers.Evan Cheng2007-05-291-7/+8
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* Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.Evan Cheng2007-05-161-2/+6
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* Added getNumExplicitOperands and findFirstPredOperand.Evan Cheng2007-05-151-0/+46
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* llvm bug #1350, parts 1, 2, and 3.Nate Begeman2007-05-011-2/+2
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* Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng2007-04-261-2/+2
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* Change findRegisterUseOperand() to return operand index instead.Evan Cheng2007-03-261-4/+4
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* Use findRegisterUseOperand to find a kill of particular register.Evan Cheng2007-02-231-3/+5
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* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+11
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* For PR1207:Reid Spencer2007-02-191-11/+0
| | | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
* Added findRegisterDefOperand().Evan Cheng2007-02-171-0/+11
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* Print <dead> def operands.Evan Cheng2007-02-161-0/+2
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* The best unbreakage yet, addressing Bill's concerns.Jeff Cohen2006-12-161-41/+28
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* An even better unbreakage...Jeff Cohen2006-12-151-0/+12
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* Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, areBill Wendling2006-12-071-2/+1
| | | | | | | now cerr, cout, and NullStream resp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32298 91177308-0d34-0410-b5e6-96231b3b80d8
* Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand().Evan Cheng2006-12-061-0/+31
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* - MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode.Evan Cheng2006-11-301-42/+35
| | | | | | | - Remove the ugly TargetInstrDescriptors hack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32032 91177308-0d34-0410-b5e6-96231b3b80d8
* Use llvm streams instead of <iostream>Bill Wendling2006-11-281-2/+2
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* Clean up.Evan Cheng2006-11-281-2/+2
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* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-20/+14
| | | | | | | of opcode and number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
* setOperand should not zap the operand list or add implicit operands to anChris Lattner2006-11-201-39/+0
| | | | | | | | | | instruction. Doing so breaks the FP stackifier, the alpha branch selector the sparc fpmover. This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31876 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor updates.Evan Cheng2006-11-151-4/+4
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* - Let MachineInstr ctors add implicit def and use operands. Other operandsEvan Cheng2006-11-131-16/+113
| | | | | | | | | | will be inserted before these operands. If the opcode changes (by setOpcode), the implicit operands are updated as well. - Added IsKill, IsDead fields to MachineOperand in preparation for changes that move kill / dead info to MachineInstr's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31711 91177308-0d34-0410-b5e6-96231b3b80d8
* Add methods to add implicit def use operands to a MI.Evan Cheng2006-11-111-0/+12
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* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-101-2/+6
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* be more aggressive about matching identical instructions.Chris Lattner2006-10-251-1/+1
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* implement MachineOperand::isIdenticalToChris Lattner2006-10-201-0/+29
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* Only call isUse/isDef on register operandsChris Lattner2006-09-051-11/+5
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* Instructions with variable operands (variable_ops) can have a number requiredEvan Cheng2006-06-151-1/+2
| | | | | | | | | | | | | | operands. e.g. def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops), "call {*}$dst", [(X86call GR32:$dst)]>; TableGen should emit operand informations for the "required" operands. Added a target instruction info flag M_VARIABLE_OPS to indicate the target instruction may have more operands in addition to the minimum required operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a bogus cast.Evan Cheng2006-05-261-1/+1
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* Final pass of minor cleanups for MachineInstrChris Lattner2006-05-041-4/+0
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* Remove redundancy and a level of indirection when creating machine operandsChris Lattner2006-05-041-21/+5
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* Remove and simplify some more machineinstr/machineoperand stuff.Chris Lattner2006-05-041-1/+1
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* Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.Chris Lattner2006-05-041-2/+2
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* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-19/+0
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* There shalt be only one "immediate" operand type!Chris Lattner2006-05-041-8/+2
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* Change "value" in MachineOperand to be a GlobalValue, as that is the onlyChris Lattner2006-05-041-14/+3
| | | | | | | thing that can be in it. Remove a dead method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28098 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a bunch more dead V9 specific stuffChris Lattner2006-05-041-25/+2
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* Remove a bunch more SparcV9 specific stuffChris Lattner2006-05-041-7/+1
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* Remove some more V9-specific stuff.Chris Lattner2006-05-041-32/+2
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* Remove some more unused stuff from MachineInstr that was leftover from V9.Chris Lattner2006-05-041-38/+0
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* JumpTable support! What this represents is working asm and jit support forNate Begeman2006-04-221-0/+6
| | | | | | | | | x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
* This field no longer existsChris Lattner2006-04-201-2/+0
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* Remove some of the obvious V9-specific cruftChris Lattner2006-04-201-101/+2
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* Add a MachineInstr::eraseFromParent convenience method.Chris Lattner2006-04-171-0/+9
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