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* int64_t -> intChris Lattner2004-02-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11977 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix crash caused by passing register 0 toAlkis Evlogimenos2004-02-271-1/+1
| | | | | | | MRegisterInfo::isPhysicalRegister(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11894 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bugs in finegrainificationChris Lattner2004-02-231-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11758 91177308-0d34-0410-b5e6-96231b3b80d8
* Finegrainify namespacificationChris Lattner2004-02-231-9/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11757 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printedChris Lattner2004-02-191-6/+16
| | | | | | | | by operator<< on MachineInstr's, and looking up what register "24" is all of the time was greatly annoying. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11623 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LeakDetection to MachineInstr.Alkis Evlogimenos2004-02-161-0/+12
| | | | | | | | Move out of line member functions of MachineBasicBlock to MachineBasicBlock.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11497 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-131-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
* Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.Brian Gaeke2004-02-131-36/+32
| | | | | | | | | Rename SetMachineOperandConst's formal parameters to match other methods here. Mark some methods as being used only by the SPARC back-end. Fix a missing-paren bug in OutputValue(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11363 91177308-0d34-0410-b5e6-96231b3b80d8
* Add parent pointer to MachineInstr that points to owningAlkis Evlogimenos2004-02-121-7/+14
| | | | | | | | | MachineBasicBlock. Also change opcode to a short and numImplicitRefs to an unsigned char so that overall MachineInstr's size stays the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11357 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename the opCode instance variable to OpcodeChris Lattner2004-02-121-29/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11348 91177308-0d34-0410-b5e6-96231b3b80d8
* This field is never readChris Lattner2004-02-121-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11346 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify the two address instruction pass to remove the duplicateAlkis Evlogimenos2004-02-041-18/+0
| | | | | | | operand of the instruction and thus simplify the register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
* When an instruction like: A += B had both A and B virtual registersAlkis Evlogimenos2004-02-031-0/+18
| | | | | | | spilled, A was loaded from its stack location twice. This fixes the bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11093 91177308-0d34-0410-b5e6-96231b3b80d8
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-141-28/+33
| | | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-201-0/+7
| | | | | | | Header files will be on the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed spelling.Misha Brukman2003-09-171-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8588 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assertion in MachineInstr::substituteValue().Vikram S. Adve2003-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7675 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not insert physical regsiters into the regsUsed setChris Lattner2003-08-051-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7617 91177308-0d34-0410-b5e6-96231b3b80d8
* All callers of these methods actually wanted them to preserve the flags,Chris Lattner2003-08-051-26/+5
| | | | | | | | | | so get rid of the def/use parameters that were getting passed in. **** This now changes the semantics of these methods to preserve the flags, not clobber them! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7602 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code, eliminating the need for the X86 isVoid target instr flagChris Lattner2003-08-031-3/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7534 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove using declChris Lattner2003-08-031-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7531 91177308-0d34-0410-b5e6-96231b3b80d8
* Change interface to MachineInstr::substituteValue to specify more preciselyVikram S. Adve2003-07-101-7/+21
| | | | | | | which args can be substituted: defsOnly, defsAndUses or usesOnly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7154 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow explicit physical registers for implicit operands.Vikram S. Adve2003-05-311-1/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6468 91177308-0d34-0410-b5e6-96231b3b80d8
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-15/+17
| | | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove obsolete ctorChris Lattner2003-01-151-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5301 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 3 new forms of MachineOperandChris Lattner2003-01-131-18/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5217 91177308-0d34-0410-b5e6-96231b3b80d8
* * Add printing support for FrameIndex operandsChris Lattner2002-12-281-24/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5194 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement printing of MBB argumentsChris Lattner2002-12-151-17/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5053 91177308-0d34-0410-b5e6-96231b3b80d8
* Print is const!Chris Lattner2002-11-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4737 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove only uses of markDef/markDefAndUse methodsChris Lattner2002-11-171-6/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4719 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove fixmeChris Lattner2002-10-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4447 91177308-0d34-0410-b5e6-96231b3b80d8
* Add special code to make printing SSA form machine instructions nicerChris Lattner2002-10-301-4/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4446 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MRegisterInfo, if available, to print symbolic register namesChris Lattner2002-10-301-7/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4438 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement structured machine code printingChris Lattner2002-10-301-7/+102
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4435 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement autoinserting ctorChris Lattner2002-10-291-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4426 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove separate vector of implicit refs from MachineInstr, andVikram S. Adve2002-10-291-11/+24
| | | | | | | | | instead record them as extra operands in the operands[] vector. Also, move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4399 91177308-0d34-0410-b5e6-96231b3b80d8
* Move TargetInstrDescriptors extern to the one .cpp file that refers to it:Chris Lattner2002-10-291-0/+8
| | | | | | | MachineInstr.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4392 91177308-0d34-0410-b5e6-96231b3b80d8
* Use higher level methods, don't use TargetInstrDescriptors directly!Chris Lattner2002-10-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4389 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove all traces of the "Opcode Mask" field in the MachineInstr classChris Lattner2002-10-281-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4359 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more default arguments that are never usedChris Lattner2002-10-281-7/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4358 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove default operands that are never usedChris Lattner2002-10-281-6/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4357 91177308-0d34-0410-b5e6-96231b3b80d8
* * Make MachineOperand ctors private, so MachineOperand can only be createdChris Lattner2002-10-281-20/+21
| | | | | | | | | by MachineInstr. * Add a bunch of new methods to allow incremental addition of operands to the machine instr instance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4356 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove two arguments that are never specifiedChris Lattner2002-10-281-8/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4348 91177308-0d34-0410-b5e6-96231b3b80d8
* Fairly major overhaul of MachineInstr & Operand classesChris Lattner2002-10-281-6/+21
| | | | | | | | | - Inline methods that are mostly a single line anyway - Eliminate several methods that were never called - Group methods a bit more consistently git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4329 91177308-0d34-0410-b5e6-96231b3b80d8
* Add #includes now that MachineInstr.h doesn't include ↵Chris Lattner2002-10-281-0/+1
| | | | | | llvm/Target/MachineInstrInfo.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4327 91177308-0d34-0410-b5e6-96231b3b80d8
* - Two minor improvements to the MachineInstr class to reduce footprint andChris Lattner2002-10-221-4/+4
| | | | | | | | overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a bitvector. Sped up LLC a little less than 10% in a debug build! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4261 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MachineInstr::replace to rewrite a machine instruction in place.Vikram S. Adve2002-09-201-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3843 91177308-0d34-0410-b5e6-96231b3b80d8
* Dump routine now writes out allocated register numbers if available.Vikram S. Adve2002-09-161-4/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3737 91177308-0d34-0410-b5e6-96231b3b80d8
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