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* Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks outDan Gohman2010-06-221-23/+50
| | | | | | | | into a utility routine, teach it how to update MachineLoopInfo, and make use of it in MachineLICM to split critical edges on demand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106555 91177308-0d34-0410-b5e6-96231b3b80d8
* Doh. Machine LICM is re-initializing the CSE map over and over. Patch by ↵Evan Cheng2010-05-291-2/+7
| | | | | | Anna Zaks. rdar://8037934. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105065 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman2010-05-131-1/+12
| | | | | | | when they move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
* When MachineLICM is hoisting a physical register after regalloc, make sure theJakob Stoklund Olesen2010-04-201-4/+17
| | | | | | | | | | | register is not killed in the loop. This fixes 188.ammp on ARM where the post-ra scheduler would grab a register that looked available but wasn't. A testcase would be huge and fragile, sorry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101930 91177308-0d34-0410-b5e6-96231b3b80d8
* Postra machine licm must add registers defined by loop invariants to *all* ofEvan Cheng2010-04-171-48/+23
| | | | | | | | | the live-in sets of BBs in the loop. Otherwise later pass may end up using the registers and override the invariant. rdar://7852937 No reasonablly sized test case possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101626 91177308-0d34-0410-b5e6-96231b3b80d8
* Fast path implicit_def check.Evan Cheng2010-04-131-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101183 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid variable shadowing.Evan Cheng2010-04-131-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101170 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand postra machine licm's capability a little more. If an instruction's ↵Evan Cheng2010-04-131-8/+24
| | | | | | register operands are all loop invariants, then it's safe to hoist it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101167 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach postra machine licm to hoist more obvious invariants, e.g. ↵Evan Cheng2010-04-131-17/+38
| | | | | | instructions with no source operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101154 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman2010-04-131-1/+1
| | | | | | | | | MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
* Plug trivial leak.Benjamin Kramer2010-04-121-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101034 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete this obsolete comment.Dan Gohman2010-04-091-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100858 91177308-0d34-0410-b5e6-96231b3b80d8
* Make post regalloc machine licm functional. It now passes all of MultiSource.Evan Cheng2010-04-081-79/+169
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100742 91177308-0d34-0410-b5e6-96231b3b80d8
* Add comments for missed opportunities.Evan Cheng2010-04-071-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100610 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Evan Cheng2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100609 91177308-0d34-0410-b5e6-96231b3b80d8
* Post regalloc LICM. Work in progress.Evan Cheng2010-04-071-11/+162
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100592 91177308-0d34-0410-b5e6-96231b3b80d8
* - Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng2010-03-031-1/+1
| | | | | | | | | whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to replace physical registers when doing CSE.Dan Gohman2010-02-281-1/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97360 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't unconditionally suppress hoisting of instructions with implicitDan Gohman2010-02-281-26/+4
| | | | | | | | | defs or uses. The regular def and use checking below covers them, and can be more precise. It's safe to hoist an instruction with a dead implicit def if the register isn't live into the loop header. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97352 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-2/+2
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-051-12/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92547 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Loop contains utility methods for testing whether a loopDan Gohman2009-12-181-1/+1
| | | | | | | | | contains another loop, or an instruction. The loop form is substantially more efficient on large loops than the typical code it replaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91654 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable hoisting load from constant memories.Evan Cheng2009-11-201-21/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89510 91177308-0d34-0410-b5e6-96231b3b80d8
* Add option -licm-const-load to hoist all loads from constant memory.Evan Cheng2009-11-201-19/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89477 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-2/+2
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89428 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment.Evan Cheng2009-11-171-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89129 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-071-35/+24
| | | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
* Code refactoring.Evan Cheng2009-11-051-49/+58
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86085 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 85799. It turns out my code isn't buggy.Evan Cheng2009-11-031-17/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng2009-11-021-46/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
* Initilize the machine LICM CSE map upon the first time an instruction is ↵Evan Cheng2009-11-021-17/+46
| | | | | | | | | | | hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MachineLICM to use the correct virtual register class whenDan Gohman2009-10-301-2/+4
| | | | | | | | | | | unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the opcode of the original operation without the load, not the load itself, MachineLICM needs to know the operand index in order to get the correct register class. Extend getOpcodeAfterMemoryUnfold to return this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the code for unfolding a load into a separate function.Dan Gohman2009-10-291-50/+62
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85515 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify this code: if the unfolded load can't be hoisted, just deleteDan Gohman2009-10-281-16/+3
| | | | | | | the new instructions and leave the old one in place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85393 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach MachineLICM to unfold loads from constant memory fromDan Gohman2009-10-281-17/+83
| | | | | | | | otherwise unhoistable instructions in order to allow the loads to be hoisted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | | VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-1/+1
| | | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-3/+1
| | | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
* isTriviallyReMaterializable checks theDan Gohman2009-10-091-1/+1
| | | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8
* Give Dan and my recent changes, machine LICM is now code size neutral.Evan Cheng2009-10-091-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83624 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a logic error that caused non-rematable loop invariants loads to be ↵Evan Cheng2009-10-091-2/+1
| | | | | | licm'ed out of loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace TargetInstrInfo::isInvariantLoad and its target-specificDan Gohman2009-10-071-3/+5
| | | | | | | | | | implementations with a new MachineInstr::isInvariantLoad, which uses MachineMemOperands and is target-independent. This brings MachineLICM and other functionality to targets which previously lacked an isInvariantLoad implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't hoist or sink instructions with physreg uses if the physreg isDan Gohman2009-09-261-3/+12
| | | | | | | | allocatable. Even if it doesn't appear to have any defs, it may latter on after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82834 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak MachineLICM for instructions that reference RIP on x86-64 too.Dan Gohman2009-09-251-2/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82825 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-9/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79754 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy #includes.Dan Gohman2009-08-111-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78677 91177308-0d34-0410-b5e6-96231b3b80d8
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-6/+7
| | | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77019 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineLICM CSE should match destination register classes; avoid hoisting ↵Evan Cheng2009-02-271-3/+13
| | | | | | implicit_def's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65592 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine LICM increases register pressure and it almost always increase code ↵Evan Cheng2009-02-051-0/+4
| | | | | | size. For now, disable it for optimizing for size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63856 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine licm to CSE hoisted instructions.Evan Cheng2009-02-051-23/+88
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63854 91177308-0d34-0410-b5e6-96231b3b80d8
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