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path: root/lib/CodeGen/MachineVerifier.cpp
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* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Edwin Török2009-07-111-2/+6
| | | | | | | and abort()/exit() -> llvm_report_error(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename MachineVerifier pass to avoid command line collision.Jakob Stoklund Olesen2009-05-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71987 91177308-0d34-0410-b5e6-96231b3b80d8
* Verify that explicit definitions in the TargetInstrDesc are matched byJakob Stoklund Olesen2009-05-161-1/+12
| | | | | | explicit register define operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71933 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow redefinition of reserved registers.Jakob Stoklund Olesen2009-05-161-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71932 91177308-0d34-0410-b5e6-96231b3b80d8
* Pacify gcc-4.3, which suggests explicit braces hereDuncan Sands2009-05-161-1/+2
| | | | | | | to avoid an ambiguous else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71924 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass to verify generated machine code.Jakob Stoklund Olesen2009-05-161-0/+677
The following is checked: * Operand counts: All explicit operands must be present. * Register classes: All physical and virtual register operands must be compatible with the register class required by the instruction descriptor. * Register live intervals: Registers must be defined only once, and must be defined before use. The machine code verifier is enabled with the command-line option '-verify-machineinstrs', or by defining the environment variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the verifier errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71918 91177308-0d34-0410-b5e6-96231b3b80d8