aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen/ProcessImplicitDefs.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen2010-07-161-14/+0
| | | | | | TII::isMoveInstr is going tobe completely removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ProcessImplicitDefs to transform more COPY instructions into ↵Evan Cheng2010-07-141-14/+40
| | | | | | IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-081-2/+1
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove references to INSERT_SUBREG after de-SSA.Jakob Stoklund Olesen2010-07-081-15/+0
| | | | | | | Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of INSERT_SUBREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107878 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen2010-07-071-0/+15
| | | | | | Buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107744 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove references to INSERT_SUBREG after de-SSAJakob Stoklund Olesen2010-07-061-15/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107732 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.Jakob Stoklund Olesen2010-07-061-1/+21
| | | | | | | | | INSERT_SUBREG will now only appear in SSA machine instructions. Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant since partial redef COPY instructions appear. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107726 91177308-0d34-0410-b5e6-96231b3b80d8
* Detect and handle COPY in many places.Jakob Stoklund Olesen2010-07-031-8/+11
| | | | | | | This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8
* It's not safe eliminate copies where src and dst have different sub-register ↵Evan Cheng2010-05-111-2/+2
| | | | | | indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103450 91177308-0d34-0410-b5e6-96231b3b80d8
* It's not safe to propagate implicit_def that defines part of a register.Evan Cheng2010-05-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103436 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR6300.Jakob Stoklund Olesen2010-02-151-3/+2
| | | | | | | A virtual register can be used before it is defined in the same MBB if the MBB is part of a loop. Teach the implicit-def pass about this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96279 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-7/+7
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix small bug in handling instructions with more than one implicitly defined ↵Jakob Stoklund Olesen2010-02-041-1/+1
| | | | | | | | | operand. ProcessImplicitDefs would only mark one operand per instruction with <undef>. This fixed PR6086. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95319 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92567 91177308-0d34-0410-b5e6-96231b3b80d8
* When all defs of a vr are implicit_def, delete all of the defs.Evan Cheng2009-11-261-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89905 91177308-0d34-0410-b5e6-96231b3b80d8
* ProcessImplicitDefs should watch out for invalidated iterator and extra ↵Evan Cheng2009-11-251-14/+45
| | | | | | implicit operands on copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89880 91177308-0d34-0410-b5e6-96231b3b80d8
* For some targets, a copy can use a register multiple times, e.g. ppc.Evan Cheng2009-11-161-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88895 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes the bug exposed by Anton's test case in PR 5495:Lang Hames2009-11-161-0/+4
| | | | | | | | | Make sure when ProcessImplicitDefs removes a copy which kills its source reg that it removes the copy from said reg's Kills list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88881 91177308-0d34-0410-b5e6-96231b3b80d8
* The Indexes Patch.Lang Hames2009-11-031-0/+231
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-05-14 02:23:18 +0000