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* When scheduling a block in parts, keep track of the overallDan Gohman2009-02-111-11/+6
| | | | | | | | | | | | instruction index across each part. Instruction indices are used to make live range queries, and live ranges can extend beyond scheduling region boundaries. Refactor the ScheduleDAGSDNodes class some more so that it doesn't have to worry about this additional information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
* Use iterators to iterate through the Preds array instead ofDan Gohman2009-02-111-2/+3
| | | | | | | | an index. This code is on the hot-path because the current way SDep edges are uniqued has quadratic complexity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64262 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out more code for computing register live-range informationforDan Gohman2009-02-101-1/+4
| | | | | | | | | | | | scheduling, and generalize is so that preserves state across scheduling regions. This fixes incorrect live-range information around terminators and labels, which are effective region boundaries. In place of looking for terminators to anchor inter-block dependencies, introduce special entry and exit scheduling units for this purpose. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of adding dependence edges between terminator instructionsDan Gohman2009-01-161-1/+8
| | | | | | | | | | | | | | | and every other instruction in their blocks to keep the terminator instructions at the end, teach the post-RA scheduler how to operate on ranges of instructions, and exclude terminators from the range of instructions that get scheduled. Also, exclude mid-block labels, such as EH_LABEL instructions, and schedule code before them separately from code after them. This fixes problems with the post-RA scheduler moving code past EH_LABELs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
* Generalize the HazardRecognizer interface so that it can be usedDan Gohman2009-01-151-0/+3
| | | | | | | | to support MachineInstr-based scheduling in addition to SDNode-based scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-9/+13
| | | | | | | | | | | | and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid referring to edge D after the Succs or Preds arrays haveDan Gohman2009-01-131-3/+3
| | | | | | | | been modified, to avoid trouble in the (unlikely) scenario that D is a reference to an element in one of those arrays. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62173 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't call setDepthDirty/setHeightDirty when adding an edgeDan Gohman2009-01-051-4/+8
| | | | | | | with latency 0, since it doesn't affect the depth or height. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61762 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor code simplifications.Dan Gohman2008-12-231-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61371 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize setDepthDirty and setHeightDirty a little, as they showedDan Gohman2008-12-221-10/+16
| | | | | | | up on a profile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61344 91177308-0d34-0410-b5e6-96231b3b80d8
* Use SmallVector's pop_back_val.Dan Gohman2008-12-201-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61277 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct Preds and Succs lists in setHeightDirty()Dan Gohman2008-12-201-4/+4
| | | | | | | and setDepthDirty(), respectively. This fixes PR3241. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61276 91177308-0d34-0410-b5e6-96231b3b80d8
* Use getDepth() and getHeight() instead of accessing theDan Gohman2008-12-171-2/+2
| | | | | | | | Depth and Height members directly, as they may not be current. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61121 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman2008-12-161-114/+127
| | | | | | | | | | | | | | | computation code. Also, avoid adding output-depenency edges when both defs are dead, which frequently happens with EFLAGS defs. Compute Depth and Height lazily, and always in terms of edge latency values. For the schedulers that don't care about latency, edge latencies are set to 1. Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array. These are all subsumed by the Depth and Height fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
* Move addPred and removePred out-of-line.Dan Gohman2008-12-161-0/+61
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61067 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite the SDep class, and simplify some of the related code.Dan Gohman2008-12-091-21/+30
| | | | | | | | | | | | | | | | | | The Cost field is removed. It was only being used in a very limited way, to indicate when the scheduler should attempt to protect a live register, and it isn't really needed to do that. If we ever want the scheduler to start inserting copies in non-prohibitive situations, we'll have to rethink some things anyway. A Latency field is added. Instead of giving each node a single fixed latency, each edge can have its own latency. This will eventually be used to model various micro-architecture properties more accurately. The PointerIntPair class and an internal union are now used, which reduce the overall size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace cleanups.Dan Gohman2008-12-091-12/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60769 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial support for anti-dependence breaking. Currently this code does notDan Gohman2008-11-251-0/+201
| | | | | | | | | | introduce any new spilling; it just uses unused registers. Refactor the SUnit topological sort code out of the RRList scheduler and make use of it to help with the post-pass scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59999 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SDep's isSpecial to isArtificial, to make this field a littleDan Gohman2008-11-211-2/+2
| | | | | | | less mysterious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59782 91177308-0d34-0410-b5e6-96231b3b80d8
* Add #include <climits> to get the definition of INT_MAX.Dan Gohman2008-11-201-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59692 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code for verifying the work of the scheduler,Dan Gohman2008-11-201-0/+54
| | | | | | | | extend it a bit, and make use of it in all schedulers, to ensure consistent checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59689 91177308-0d34-0410-b5e6-96231b3b80d8
* Experimental post-pass scheduling support. Post-pass schedulingDan Gohman2008-11-191-0/+210
is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
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