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* Use the source-order scheduler instead of the "fast" scheduler at -O0,Dan Gohman2010-07-161-1/+1
| | | | | | | | because it's more likely to keep debug line information in its original order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108496 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-76/+119
| | | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify what mysterious check means.Bill Wendling2010-07-091-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-119/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-76/+119
| | | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
* Extension of r107506. Make sure that we don't mark a function as having a callBill Wendling2010-07-081-1/+2
| | | | | | | if the inline ASM doesn't need a stack frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-94/+86
| | | | | | | Debug info intrinsics win for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -fast-isel-abort to check the right instruction.Dan Gohman2010-07-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-37/+41
| | | | | | | a separate DCE pass over MachineInstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the insert position after scheduling, which may change theDan Gohman2010-07-071-0/+1
| | | | | | | | position when emitting multiple blocks when executing a custom inserter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-071-53/+56
| | | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-071-7/+1
| | | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789 91177308-0d34-0410-b5e6-96231b3b80d8
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-071-1/+1
| | | | | | | allow target-specific fast-isel code to make use of it directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
* CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman2010-07-061-3/+2
| | | | | | | SelectBasicBlock doesn't needs its BasicBlock argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
* Proper indentation.Bill Wendling2010-07-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107581 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen2010-07-021-0/+1
| | | | | | | | | | | | | | | | | | | | | PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename CreateReg to CreateRegs, and MakeReg to CreateReg.Dan Gohman2010-07-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107451 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily disable on-demand fast-isel.Dan Gohman2010-07-011-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107393 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FuncInfo's isExportedInst accessor method instead ofDan Gohman2010-07-011-1/+1
| | | | | | | doing the work manually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107384 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename CreateRegForValue to CreateReg, and change its argumentDan Gohman2010-07-011-1/+1
| | | | | | | | from a Value to a Type, because it doesn't actually care about the Value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107383 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable on-demand fast-isel.Dan Gohman2010-07-011-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r106634, now that the bug it exposed is fixed.Dan Gohman2010-06-241-99/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r106263, "Fold the ShrinkDemandedOps pass into the regular ↵Daniel Dunbar2010-06-231-1/+99
| | | | | | DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor code simplifications.Dan Gohman2010-06-181-18/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106286 91177308-0d34-0410-b5e6-96231b3b80d8
* Give NamedRegionTimer an Enabled flag, allowing all its clients toDan Gohman2010-06-181-48/+28
| | | | | | | | | | | | | | | | | | | | | switch from this: if (TimePassesIsEnabled) { NamedRegionTimer T(Name, GroupName); do_something(); } else { do_something(); // duplicate the code, this time without a timer! } to this: { NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled); do_something(); } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106285 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman2010-06-181-99/+1
| | | | | | | which is faster, simpler, and less surprising. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValueDan Gohman2010-05-291-2/+2
| | | | | | | | shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FIXME comment to remove this.Bill Wendling2010-05-261-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104749 91177308-0d34-0410-b5e6-96231b3b80d8
* Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list ofBill Wendling2010-05-261-21/+24
| | | | | | | usual suspects that could "return twice". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104737 91177308-0d34-0410-b5e6-96231b3b80d8
* Update debug info when live-in reg is copied into a vreg.Devang Patel2010-05-261-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the check for "calls setjmp" to SelectionDAGISel so that it can be used byBill Wendling2010-05-261-0/+32
| | | | | | | more than just the stack slot coloring algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r104655 as it's breaking the bots.Eric Christopher2010-05-261-34/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
* Dale and Evan suggested putting the "check for setjmp" much earlier in theBill Wendling2010-05-261-0/+34
| | | | | | | machine code generation. That's a good idea, so I made it so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng2010-05-201-2/+4
| | | | | | | | | | pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
* Code refactoring: pull SchedPreference enum from TargetLowering.h to ↵Evan Cheng2010-05-191-3/+3
| | | | | | TargetMachine.h and put it in its own namespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
* - Set the "HasCalls" flag after instruction selection is finished.Bill Wendling2010-05-171-13/+19
| | | | | | | | - Change the logic DisableFramePointerElim() to check for the -disable-non-leaf-fp-elim before -disable-fp-elim. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-0/+14
| | | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
* Instruction selection optimizations may have moved the def of a function ↵Evan Cheng2010-05-041-1/+2
| | | | | | argument out of the entry block. rdar://7937489 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102993 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the code for special-casing byval for fast-isel. SelectionDAGDan Gohman2010-05-011-18/+2
| | | | | | | | handles argument lowering anyway, so there's no need for special casing here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102828 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix whitespace.Dan Gohman2010-05-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102817 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorgnaize more switch code lowering to clean up some trickyDan Gohman2010-05-011-21/+22
| | | | | | | | | | | | code, and to eliminate the need for the SelectionDAGBuilder state to be live during CodeGenAndEmitDAG calls. Call SDB->clear() before CodeGenAndEmitDAG calls instead of before it, and move the CurDAG->clear() out of SelectionDAGBuilder, which doesn't own the DAG, and into CodeGenAndEmitDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102814 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-011-14/+6
| | | | | | | changes before doing phi lowering for switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove this debug output. The MachineFunction will be printed once all ofDan Gohman2010-04-301-3/+0
| | | | | | | | instruction selection is done; it's confusing to see parts of it printed, while other parts are omitted, along the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102771 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-enable 102565 with fixes.Evan Cheng2010-04-291-5/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102602 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily disable my changes to unbreak the build.Evan Cheng2010-04-291-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102590 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid emitting a dbg_value machineinstr that's not going to be inserted into ↵Evan Cheng2010-04-291-2/+0
| | | | | | entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102581 91177308-0d34-0410-b5e6-96231b3b80d8
* Check Reg against zero.Evan Cheng2010-04-291-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102573 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace r102368 with code that's less fragile. This creates DBG_VALUE ↵Evan Cheng2010-04-281-5/+19
| | | | | | instructions for function arguments early and insert them after instruction selection is done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
* Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISelDan Gohman2010-04-231-14/+0
| | | | | | | itself too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink SelectionDAGBuilder's HandlePHINodesInSuccessorBlocks downDan Gohman2010-04-221-13/+1
| | | | | | | into SelectionDAGBuilder itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102128 91177308-0d34-0410-b5e6-96231b3b80d8
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