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* Rename getABITypeSize to getTypePaddedSize, asDuncan Sands2009-01-124-14/+15
| | | | | | | suggested by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical ↵Evan Cheng2009-01-124-61/+84
| | | | | | | | | register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency. Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
* CheckForPhysRegDependency should not return copy cost. It's not used. No ↵Evan Cheng2009-01-111-9/+4
| | | | | | functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62036 91177308-0d34-0410-b5e6-96231b3b80d8
* Duplicated node may produce a non-physical register def.Evan Cheng2009-01-091-3/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor debug output tweak.Evan Cheng2009-01-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62005 91177308-0d34-0410-b5e6-96231b3b80d8
* Request DwarfWriter. This will be used to handle dbg_* intrinsics.Devang Patel2009-01-092-2/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61999 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed trailing whitespace from Makefiles.Misha Brukman2009-01-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove redundant 'else's. No functionality change.Dan Gohman2009-01-071-7/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61891 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in ComputeLinearIndex computation handling multi-levelDan Gohman2009-01-061-1/+3
| | | | | | | | | aggregate types. Don't increment the current index after reaching the end of a struct, as it will already be pointing at one-past-the end. This fixes PR3288. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61828 91177308-0d34-0410-b5e6-96231b3b80d8
* Update these argument lists for the isNormalMemoryDan Gohman2009-01-061-3/+6
| | | | | | | argument. This doesn't affect current functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61779 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a latency value of 0 for the artificial edges inserted byDan Gohman2009-01-061-1/+1
| | | | | | | | | | | | | AddPseudoTwoAddrDeps. This lets the scheduling infrastructure avoid recalculating node heights. In very large testcases this was a major bottleneck. Thanks to Roman Levenstein for finding this! As a side effect, fold-pcmpeqd-0.ll is now scheduled better and it no longer requires spilling on x86-32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61778 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need itsDan Gohman2009-01-051-2/+0
| | | | | | | | own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END, as long as it takes care to round up when needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-052-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
* squash warnings.Devang Patel2009-01-051-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.Dan Gohman2009-01-031-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
* CommuteNodesToReducePressure() is now removed.Dan Gohman2009-01-031-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61612 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the code from the scheduler that commuted two-addressDan Gohman2009-01-032-71/+0
| | | | | | | | | | | | | | | instructions to avoid copies, because TwoAddressInstructionPass also does this optimization. The scheduler's version didn't account for live-out values, which resulted in spurious commutes and missed opportunities. Now, TwoAddressInstructionPass handles all the opportunities, instead of just those that the scheduler missed. The result is usually the same, though there are occasional trivial differences resulting from the avoidance of spurious commutes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61611 91177308-0d34-0410-b5e6-96231b3b80d8
* Factorize (and generalize) the code promoting SELECTDuncan Sands2009-01-013-152/+105
| | | | | | | | and BRCOND conditions. Reorder a few methods while there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61547 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing spaces.Duncan Sands2009-01-012-33/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61545 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR3274: when promoting the condition of a BRCOND node,Duncan Sands2009-01-017-103/+130
| | | | | | | | | | | promote from i1 all the way up to the canonical SetCC type. In order to discover an appropriate type to use, pass MVT::Other to getSetCCResultType. In order to be able to do this, change getSetCCResultType to take a type as an argument, not a value (this is also more logical). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach LeaglizeDAG that i64 mul can be a libcall.Scott Michel2008-12-291-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61463 91177308-0d34-0410-b5e6-96231b3b80d8
* Change comments so everybody can understand them, hopefully.Dale Johannesen2008-12-231-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61405 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another permutation where we should get rid of a-a.Dale Johannesen2008-12-231-4/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore debug printingAnton Korobeynikov2008-12-231-23/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61398 91177308-0d34-0410-b5e6-96231b3b80d8
* Sometimes APInt syntax is really ugly... :(Anton Korobeynikov2008-12-231-10/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61397 91177308-0d34-0410-b5e6-96231b3b80d8
* Indent stuff properlyAnton Korobeynikov2008-12-231-25/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61396 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial checkin of APInt'ififcation of switch loweringAnton Korobeynikov2008-12-232-127/+126
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61395 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up the atomic opcodes in SelectionDAG.Dan Gohman2008-12-234-536/+138
| | | | | | | | | | | | | | This removes all the _8, _16, _32, and _64 opcodes and replaces each group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode is now used to carry the size information. In tablegen, the size-specific opcodes are replaced by size-independent opcodes that utilize the ability to compose them with predicates. This shrinks the per-opcode tables and makes the code that handles atomics much more concise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename BuildSchedUnits to BuildSchedGraph, and refactor theDan Gohman2008-12-234-10/+20
| | | | | | | code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61376 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid an unnecessary call to allnodes_size(), which is linear.Dan Gohman2008-12-231-8/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61372 91177308-0d34-0410-b5e6-96231b3b80d8
* One more permutation of subtracting off a base value.Dale Johannesen2008-12-231-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for vector widening.Mon P Wang2008-12-186-43/+1238
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix expansion of vsetcc to set the high bit for true instead of 1.Mon P Wang2008-12-171-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61129 91177308-0d34-0410-b5e6-96231b3b80d8
* Double the amount of memory reserved for SUnits. This is aDan Gohman2008-12-171-1/+3
| | | | | | | | | | temporary workaround for an obscure bug. When node cloning is used, it is possible that more SUnits will be created, and if the SUnits std::vector has to reallocate, it will invalidate all the graph edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61122 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for PR3225: disable a broken optimization inEli Friedman2008-12-171-0/+3
| | | | | | | | | | | DAGTypeLegalizer::ExpandShiftWithKnownAmountBit. In terms of restoring the optimization, the best fix here isn't obvious... any ideas? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
* A new dag combine; several permutations of thisDale Johannesen2008-12-161-0/+6
| | | | | | | | are there under ADD, this one was missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve SourceValue information when lowering produces multiple loads fromDan Gohman2008-12-161-3/+6
| | | | | | | different offsets within the same stack slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61093 91177308-0d34-0410-b5e6-96231b3b80d8
* We have decided not to support inline asm where an output operand with a ↵Evan Cheng2008-12-161-11/+12
| | | | | | matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61092 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some special-case logic in ScheduleDAGSDNodes's Dan Gohman2008-12-161-10/+0
| | | | | | | | latency computation code that is no longer needed with the new method for handling latencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61074 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman2008-12-164-57/+49
| | | | | | | | | | | | | | | computation code. Also, avoid adding output-depenency edges when both defs are dead, which frequently happens with EFLAGS defs. Compute Depth and Height lazily, and always in terms of edge latency values. For the schedulers that don't care about latency, edge latencies are set to 1. Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array. These are all subsumed by the Depth and Height fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
* Make addPred and removePred return void, since the return value is notDan Gohman2008-12-162-8/+8
| | | | | | | currently used by anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for splitting and scalarizing vector shifts.Mon P Wang2008-12-152-0/+19
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* Fix printing of PseudoSourceValues in SDNode graphs.Dan Gohman2008-12-151-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support to LegalizeType for expanding the operands of scalar to vectorMon P Wang2008-12-153-9/+57
| | | | | | | | and insert vector element. Modified extract vector element to extend the result to match the expected promoted type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r60997, this time without forgetting thatDuncan Sands2008-12-142-7/+14
| | | | | | | | target constants are allowed to have an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r60997. It was causing this failure:Bill Wendling2008-12-132-10/+7
| | | | | | | | | | | | | | | | | | | | | | Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738 Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493. 0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98 1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593 2 libSystem.B.dylib 0x96cac09b _sigtramp + 43 3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359 4 libSystem.B.dylib 0x96d24ec2 raise + 26 5 libSystem.B.dylib 0x96d3447f abort + 73 6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101 7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
* LegalizeDAG is not supposed to introduce illegalDuncan Sands2008-12-132-7/+10
| | | | | | | | types into the DAG if they were not already there. Check this with an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove assertion to allow promotion of a truncating store operandMon P Wang2008-12-131-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
* Added basic support for expanding VSETCCMon P Wang2008-12-131-2/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
* On big-endian machines it is wrong to do a fullDuncan Sands2008-12-131-19/+22
| | | | | | | | | | | width register load followed by a truncating store for the copy, since the load will not place the value in the lower bits. Probably partial loads/stores can never happen here, but fix it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
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