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* Completed basic intra block split implementation.Lang Hames2009-06-241-43/+114
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74114 91177308-0d34-0410-b5e6-96231b3b80d8
* More VNInfo tweaking, plus a little progress on intra-block splitting.Lang Hames2009-06-191-22/+73
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73750 91177308-0d34-0410-b5e6-96231b3b80d8
* VNInfo cleanup.Lang Hames2009-06-171-26/+41
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73634 91177308-0d34-0410-b5e6-96231b3b80d8
* Update to in-place spilling framework. Includes live interval scaling and ↵Lang Hames2009-06-021-87/+110
| | | | | | trivial rewriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72729 91177308-0d34-0410-b5e6-96231b3b80d8
* New Spiller interface and trivial implementation.Lang Hames2009-05-181-0/+206
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72030 91177308-0d34-0410-b5e6-96231b3b80d8
* Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.Lang Hames2009-05-061-1896/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71057 91177308-0d34-0410-b5e6-96231b3b80d8
* It has finally happened. Spiller is now using live interval info.Evan Cheng2009-04-211-30/+55
| | | | | | | This fixes a very subtle bug. vr defined by an implicit_def is allowed overlap with any register since it doesn't actually modify anything. However, if it's used as a two-address use, its live range can be extended and it can be spilled. The spiller must take care not to emit a reload for the vn number that's defined by the implicit_def. This is both a correctness and performance issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69743 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach spiller to unfold instructions which modref spill slot when a scratchEvan Cheng2009-04-171-8/+211
| | | | | | | | | | | | | | | | | | | | | register is available and when it's profitable. e.g. xorq %r12<kill>, %r13 addq %rax, -184(%rbp) addq %r13, -184(%rbp) ==> xorq %r12<kill>, %r13 movq -184(%rbp), %r12 addq %rax, %r12 addq %r13, %r12 movq %r12, -184(%rbp) Two more instructions, but fewer memory accesses. It can also open up opportunities for more optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69341 91177308-0d34-0410-b5e6-96231b3b80d8
* When assigning a physical register to a MachineOperand, setDan Gohman2009-04-131-1/+10
| | | | | | | | | | the subreg field to 0, since the subreg field is only used for virtual register subregs. This doesn't change current functionality; it just eliminates bogus noise from debug output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68955 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-091-2/+2
| | | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
* Oy! When reverting r68073, I added in experimental code. Sorry...Bill Wendling2009-03-311-62/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68099 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r68073. It's causing a failure in the Apple-style builds.Bill Wendling2009-03-311-31/+62
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68092 91177308-0d34-0410-b5e6-96231b3b80d8
* Balance out quote in debug output.Bill Wendling2009-03-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68059 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed build warnings for unused variables.Sanjiv Gupta2009-03-201-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67372 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-191-10/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67335 91177308-0d34-0410-b5e6-96231b3b80d8
* Spiller may unfold load / mod / store instructions as an optimization when ↵Evan Cheng2009-03-171-4/+9
| | | | | | the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67068 91177308-0d34-0410-b5e6-96231b3b80d8
* Add newlines at end of file (this can annoy gcov)Daniel Dunbar2009-03-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67000 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorganize some #include's.Owen Anderson2009-03-121-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66780 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. ↵Owen Anderson2009-03-111-0/+1655
No (intended) functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66720 91177308-0d34-0410-b5e6-96231b3b80d8
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