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* Remove unnecessary cast that was also unnecessarily casting away constness.David Blaikie2012-08-211-1/+1
| | | | | | | | | | Even looking at the revision history I couldn't quite piece together why this cast was ever written in the first place, but I assume it was because of some change in the inheritance, perhaps this function was reimplemented in a derived type & this caller was meant to get the base version (& it wasn't virtual)? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162301 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the --param ssp-buffer-size= driver option.Chad Rosier2012-08-211-9/+3
| | | | | | PR9673 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162284 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen2012-08-202-9/+16
| | | | | | | | | | | | The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. This patch was originally committed as r161460, but reverted again because of assertion failures. Now that duplicate Machine CFG edges have been eliminated, this works properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162233 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't add CFG edges for redundant conditional branches.Jakob Stoklund Olesen2012-08-202-3/+22
| | | | | | | | | | | | | IR that hasn't been through SimplifyCFG can look like this: br i1 %b, label %r, label %r Make sure we don't create duplicate Machine CFG edges in this case. Fix the machine code verifier to accept conditional branches with a single CFG edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162230 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a verification pass after ExpandISelPseudos.Jakob Stoklund Olesen2012-08-201-1/+2
| | | | | | | This pass often has weird CFG hacks and hand-written MI building code that can go wrong in many ways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162224 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CFG checks to MachineVerifier.Jakob Stoklund Olesen2012-08-201-0/+40
| | | | | | | Verify that the predecessor and successor lists are consistent and free of duplicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162223 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed DAGCombiner bug (found and localized by James Malloy):Stepan Dyatkovskiy2012-08-201-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it consists purely of get_vector_elts from one or two source vectors. If so, it either makes a concat_vectors node or a shufflevector node. However, it doesn't check the element type width of the underlying vector, so if you have this sequence: Node0: v4i16 = ... Node1: i32 = extract_vector_elt Node0 Node2: i32 = extract_vector_elt Node0 Node3: v16i8 = BUILD_VECTOR Node1, Node2, ... It will attempt to: Node0: v4i16 = ... NewNode1: v16i8 = concat_vectors Node0, ... Where this is actually invalid because the element width is completely different. This causes an assertion failure on DAG legalization stage. Fix: If output item type of BUILD_VECTOR differs from input item type. Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to: Node0: v4i16 = ... NewNode1: v8i16 = concat_vectors Node0, ... NewNode2: v16i8 = bitcast NewNode1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162195 91177308-0d34-0410-b5e6-96231b3b80d8
* Make atomic load and store of pointers work. Tighten verification of atomic ↵Eli Friedman2012-08-171-2/+2
| | | | | | | | | | | operations so other unexpected operations don't slip through. Based on patch by Logan Chien. PR11786/PR13186. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162146 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement stack protectors for structures with character arrays in them.Bill Wendling2012-08-171-15/+40
| | | | | | | <rdar://problem/10545247> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162131 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling2012-08-171-2/+2
| | | | | | | | | | | | | | | | | | | | | make it more consistent with its intended semantics. The `linker_private_weak_def_auto' linkage type was meant to automatically hide globals which never had their addresses taken. It has nothing to do with the `linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix among other things. The intended semantic is more like the `linkonce_odr' linkage type. Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore changing the semantics so that it produces the correct output for the linker. Note: The old linkage name `linker_private_weak_def_auto' will still parse but is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0. <rdar://problem/11754934> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Use the large shift amount during legalize types. The ↵Benjamin Kramer2012-08-171-3/+3
| | | | | | legalizer may call us with an overly large type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
* Use standard pattern for iterate+erase.Jakob Stoklund Olesen2012-08-171-9/+2
| | | | | | | | | Increment the MBB iterator at the top of the loop to properly handle the current (and previous) instructions getting erased. This fixes PR13625. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162099 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MCID::Select flag and TII hooks for optimizing selects.Jakob Stoklund Olesen2012-08-161-16/+27
| | | | | | | | | | | | Select instructions pick one of two virtual registers based on a condition, like x86 cmov. On targets like ARM that support predication, selects can sometimes be eliminated by predicating the instruction defining one of the operands. Teach PeepholeOptimizer to recognize select instructions, and ask the target to optimize them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix undefined behavior: don't perform array indexing through a potentially nullRichard Smith2012-08-151-1/+2
| | | | | | | pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161919 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix undefined behavior: binding null pointer to reference. No functionality ↵Richard Smith2012-08-141-1/+1
| | | | | | change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161853 91177308-0d34-0410-b5e6-96231b3b80d8
* Grammar.Eric Christopher2012-08-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161851 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-132-0/+60
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
* Transfer weights in transferSuccessorsAndUpdatePHIs().Jakob Stoklund Olesen2012-08-131-5/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161805 91177308-0d34-0410-b5e6-96231b3b80d8
* Print out MachineBasicBlock successor weights when available.Jakob Stoklund Olesen2012-08-131-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161804 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-131-11/+0
| | | | | | | | | | | | | | | It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace cleanup.Bill Wendling2012-08-131-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161788 91177308-0d34-0410-b5e6-96231b3b80d8
* Count triangles and diamonds in early if-conversion.Jakob Stoklund Olesen2012-08-131-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161783 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete dead typedef.Jakob Stoklund Olesen2012-08-131-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161782 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-131-20/+67
| | | | | | | | It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161781 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps ↵Benjamin Kramer2012-08-111-4/+3
| | | | | | already. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161729 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13578: Teach MachineCSE that instructions that use a constant register can ↵Benjamin Kramer2012-08-111-2/+5
| | | | | | | | be CSE'd safely. This is common e.g. when doing rip-relative addressing on x86_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161728 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a proper if-conversion cost model.Jakob Stoklund Olesen2012-08-101-13/+77
| | | | | | | | | | | | | | Detect when there is not enough available ILP, so if-conversion can't speculate instructions for free. Compute the lengthening of the critical path when inserting a select instruction that depends on the condition as well as both sides of the if. Reject conversions that would stretch the critical path by more than half a mispredict penalty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161713 91177308-0d34-0410-b5e6-96231b3b80d8
* Give MachineTraceMetrics its own debug tag.Jakob Stoklund Olesen2012-08-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161712 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more trace query functions.Jakob Stoklund Olesen2012-08-102-0/+42
| | | | | | | | | | | Trace::getResourceLength() computes the number of cycles required to execute the trace when ignoring data dependencies. The number can be compared to the critical path to estimate the trace ILP. Trace::getPHIDepth() computes the data dependency depth of a PHI in a trace successor that isn't necessarily part of the trace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161711 91177308-0d34-0410-b5e6-96231b3b80d8
* Add getTPred() and getFPred() functions.Jakob Stoklund Olesen2012-08-101-2/+8
| | | | | | They identify the PHI predecessors in both diamonds and triangles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161689 91177308-0d34-0410-b5e6-96231b3b80d8
* Include loop-carried dependencies when computing instr heights.Jakob Stoklund Olesen2012-08-101-6/+18
| | | | | | | | | When a trace ends with a back-edge, include PHIs in the loop header in the height computations. This makes the critical path through a loop more accurate by including the latencies of the last instructions in the loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161688 91177308-0d34-0410-b5e6-96231b3b80d8
* Update edge weights correctly in replaceSuccessor().Jakob Stoklund Olesen2012-08-101-9/+33
| | | | | | | | When replacing Old with New, it can happen that New is already a successor. Add the old and new edge weights instead of creating a duplicate edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161653 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-101-45/+47
| | | | | | | No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
* Also update MRI use lists when changing a use to a def and vice versa.Jakob Stoklund Olesen2012-08-101-19/+38
| | | | | | This was the cause of the buildbot failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161643 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-091-47/+45
| | | | | | These commits broke a number of buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-091-3/+11
| | | | | | | | | | | | | | | | This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-091-45/+39
| | | | | | | | | | | Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
* Move use list management into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-093-77/+70
| | | | | | | | | | | | | | Register MachineOperands are kept in linked lists accessible via MRI's reg_iterator interfaces. The linked list management was handled partly by MachineOperand methods, partly by MRI methods. Move all of the list management into MRI, delete MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo(). Be more explicit about handling the cases where an MRI pointer isn't available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161632 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a future TwoAddressInstructionPass crash.Jakob Stoklund Olesen2012-08-091-1/+2
| | | | | | | No test case, the crash only happens when the default use list order is changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161627 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the legalization of ExtLoad on ARM. ExpandUnalignedLoad did not properly Nadav Rotem2012-08-091-3/+4
| | | | | | | | | handle the cases where the memory value type was illegal. PR 13111. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161565 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use getNextOperandForReg() in RAFast.Jakob Stoklund Olesen2012-08-081-8/+4
| | | | | | That particular optimization was probably premature anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161541 91177308-0d34-0410-b5e6-96231b3b80d8
* Deal with irreducible control flow when building traces.Jakob Stoklund Olesen2012-08-081-17/+22
| | | | | | | | | | | We filter out MachineLoop back-edges during the trace-building PO traversals, but it is possible to have CFG cycles that aren't natural loops, and MachineLoopInfo doesn't include such cycles. Use a standard visited set to detect such CFG cycles, and completely ignore them when picking traces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161532 91177308-0d34-0410-b5e6-96231b3b80d8
* Heed -stress-early-ifcvt.Jakob Stoklund Olesen2012-08-081-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161513 91177308-0d34-0410-b5e6-96231b3b80d8
* Get the MispredictPenalty from MCSchedModel.Jakob Stoklund Olesen2012-08-081-5/+6
| | | | | | Thanks, Andy! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161507 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor cleanup of defaultDefLatency APIAndrew Trick2012-08-081-6/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161470 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Fix a quadratic algorithm in MachineBranchProbabilityInfo."Jakob Stoklund Olesen2012-08-082-16/+9
| | | | | | It caused an assertion failure when compiling consumer-typeset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161463 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-2/+18
| | | | | | | | | | | | | | | We perform the following: 1> Use SUB instead of CMP for i8,i16,i32 and i64 in ISel lowering. 2> Modify MachineCSE to correctly handle implicit defs. 3> Convert SUB back to CMP if possible at peephole. Removed pattern matching of (a>b) ? (a-b):0 and like, since they are handled by peephole now. rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161462 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen2012-08-082-9/+16
| | | | | | | | The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161460 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip tied operand pairs that already have the same register.Jakob Stoklund Olesen2012-08-071-10/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161454 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SelectionDAG::getTargetIndex.Jakob Stoklund Olesen2012-08-074-0/+35
| | | | | | | This adds support for TargetIndex operands during isel. The meaning of these (index, offset, flags) operands is entirely defined by the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161453 91177308-0d34-0410-b5e6-96231b3b80d8
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