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* detabify llvm, patch by Mike Stump!Chris Lattner2008-03-204-54/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix X86's isTruncateFree to not claim that truncate to i1 is free. This ↵Christopher Lamb2008-03-191-0/+25
| | | | | | fixes Bill's testcase that failed for r48491. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a coalescer bug caused by a typo.Evan Cheng2008-03-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48526 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix live variables issues:Evan Cheng2008-03-191-6/+43
| | | | | | | | | | | | 1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue. 2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register: = EAX, AX<imp-use,kill> ... AX = In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48521 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.Bill Wendling2008-03-181-26/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
* Make conversions of i8/i16 to ppcf128 work.Dale Johannesen2008-03-181-10/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
* Target independent DAG transform to use truncate for field extraction + sign ↵Christopher Lamb2008-03-181-0/+26
| | | | | | extend on targets where this is profitable. Passes nightly on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite code that propagate isDead information after a dead copy is ↵Evan Cheng2008-03-182-78/+151
| | | | | | coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48490 91177308-0d34-0410-b5e6-96231b3b80d8
* A first attempt at updating live intervals, with code lifted fromOwen Anderson2008-03-171-4/+176
| | | | | | | | the coalescer. This doesn't really work, but gets us farther than before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48446 91177308-0d34-0410-b5e6-96231b3b80d8
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-162-141/+89
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove isImplicitDef TargetInstrDesc flag.Evan Cheng2008-03-151-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48381 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-152-4/+18
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not generate special entries in the dwarf ehDuncan Sands2008-03-141-6/+2
| | | | | | | table for nounwind calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48373 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR2138. Apparently any modification to a std::multimap (including remove ↵Evan Cheng2008-03-141-2/+8
| | | | | | entries for a different key) can invalidate multimap iterators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48371 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify using getIntPtrConstant.Duncan Sands2008-03-141-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48355 91177308-0d34-0410-b5e6-96231b3b80d8
* Tabs -> spacesNate Begeman2008-03-141-14/+23
| | | | | | | | Use getIntPtrConstant in a couple places to shorten stuff up Handle splitting vector shuffles with undefs in the mask git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
* Livein copy scheduling fixes: do not coalesce physical register copies, ↵Evan Cheng2008-03-141-112/+42
| | | | | | correctly determine the safe location to insert the copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
* More APInt-ification.Dan Gohman2008-03-135-67/+77
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
* Undo tweak. It had no obvious benefit.Evan Cheng2008-03-131-19/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48341 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Evan Cheng2008-03-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48337 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to sink 3-address instruction if convertToThreeAddress created ↵Evan Cheng2008-03-131-1/+6
| | | | | | more than one instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48336 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an unused command line option.Evan Cheng2008-03-131-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48334 91177308-0d34-0410-b5e6-96231b3b80d8
* TwoAddressInstructionPass enhancement. After it converts a two address ↵Evan Cheng2008-03-131-13/+131
| | | | | | instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48333 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-131-10/+14
| | | | | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused options.Evan Cheng2008-03-131-13/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48319 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor some code out of MachineSink into a MachineInstr query.Evan Cheng2008-03-132-29/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48311 91177308-0d34-0410-b5e6-96231b3b80d8
* Experimental scheduler change to schedule / coalesce the copies added for ↵Evan Cheng2008-03-121-23/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1028<def> = MOV32rr %EAX %reg1029<def> = MOV32rr %EDX %reg1030<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025<def> = MOV32rr %reg1029 %reg1026<def> = MOV32rr %reg1030 %reg1024<def> = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1024<def> = MOV32rr %EAX %reg1025<def> = MOV32rr %EDX %reg1026<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial soft-float support for LegalizeTypes. I rewroteDuncan Sands2008-03-126-34/+248
| | | | | | | | | | | | | | | | | | | | | | the fcopysign expansion from LegalizeDAG to get rid of what seems to be a bug: the use of sign extension means that when copying the sign bit from an f32 to an f64, the upper 32 bits of the f64 (now an i64) are set, not just the top bit... I also generalized it to work for any sized floating point types, and removed the bogosity: SDOperand Mask1 = (SrcVT == MVT::f64) ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT) : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT); Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1); (here SrcNVT is an integer with the same size as SrcVT). As far as I can see this takes a 1 << 63, converts to a double, converts that to a floating point constant then converts that to an integer constant, ending up with... 1 << 63 as an integer constant! So I just generate this integer constant directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
* Change VirtRegMap's dump to dump to cerr, not DOUT, so that itDan Gohman2008-03-121-1/+1
| | | | | | | | can be called from within a debuger without having -debug specified on the command-line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48298 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typos in comments.Dan Gohman2008-03-121-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48297 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Duncan Sands2008-03-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to extract an i32 from an f64. ThisDuncan Sands2008-03-122-12/+22
| | | | | | | | | | | | | getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up my own mess.Evan Cheng2008-03-121-7/+1
| | | | | | | X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
* We also need to collect the VN IDs for the PHI instructions for later updating.Owen Anderson2008-03-121-1/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48278 91177308-0d34-0410-b5e6-96231b3b80d8
* When we're determining what registers to coallesce, track the VNInfo IDs for ↵Owen Anderson2008-03-121-16/+32
| | | | | | | | | the definitions that feed the PHI instructions. We'll need these IDs in order to update LiveIntervals properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48277 91177308-0d34-0410-b5e6-96231b3b80d8
* Total brain cramp.Evan Cheng2008-03-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
* Set NextMII after issuing a physical register spill.Evan Cheng2008-03-121-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48263 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor debug output bug.Evan Cheng2008-03-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48261 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137Anton Korobeynikov2008-03-111-1/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-113-7/+7
| | | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
* Honour aliases visibility during asm emissionAnton Korobeynikov2008-03-111-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48249 91177308-0d34-0410-b5e6-96231b3b80d8
* Transfer physical register spill info when load / store folding happens.Evan Cheng2008-03-113-1/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48246 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct value for InSignBit.Dan Gohman2008-03-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial codegen support for functions and calls with multiple return values.Dan Gohman2008-03-111-18/+51
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb2008-03-112-39/+26
| | | | | | failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.Evan Cheng2008-03-111-21/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48221 91177308-0d34-0410-b5e6-96231b3b80d8
* When the register allocator runs out of registers, spill a physical register ↵Evan Cheng2008-03-116-9/+186
| | | | | | around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
* Some LegalizeTypes code factorization and minorDuncan Sands2008-03-115-56/+113
| | | | | | | enhancements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
* compile: double test() {}Chris Lattner2008-03-111-1/+3
| | | | | | | | | | | | | | | | | | | | | | into: _test: fldz ret instead of: _test: subl $12, %esp #IMPLICIT_DEF %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $12, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
* variadic instructions don't have operand info for variadic arguments.Chris Lattner2008-03-111-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
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