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* MachineSink: Sort the successors before trying to find SuccToSinkTo.Manman Ren2012-07-311-2/+15
| | | | | | | | | | | One motivating example is to sink an instruction from a basic block which has two successors: one outside the loop, the other inside the loop. We should try to sink the instruction outside the loop. rdar://11980766 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161062 91177308-0d34-0410-b5e6-96231b3b80d8
* Conform to LLVM coding style.Micah Villmow2012-07-311-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161061 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't generate ordered or unordered comparison operations if it is not legal ↵Micah Villmow2012-07-311-1/+2
| | | | | | to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161053 91177308-0d34-0410-b5e6-96231b3b80d8
* Clear kill flags in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-07-311-0/+2
| | | | | | | | | We are extending live ranges, so kill flags are not accurate. They aren't needed until they are recomputed after RA anyway. <rdar://problem/11950722> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161023 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse order of the two branches at end of a basic block if it is profitable.Manman Ren2012-07-311-1/+15
| | | | | | | | | | | | | | | | We branch to the successor with higher edge weight first. Convert from je LBB4_8 --> to outer loop jmp LBB4_14 --> to inner loop to jne LBB4_14 jmp LBB4_8 PR12750 rdar: 11393714 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161018 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the latest MachineRegisterInfo APIs. No functionality.Andrew Trick2012-07-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161010 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline MachineRegisterInfo::hasOneUseAndrew Trick2012-07-301-7/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161007 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid looking at stale data in verifyAnalysis().Jakob Stoklund Olesen2012-07-301-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161004 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow traces to enter nested loops.Jakob Stoklund Olesen2012-07-301-14/+29
| | | | | | | | | | | This lets traces include the final iteration of a nested loop above the center block, and the first iteration of a nested loop below the center block. We still don't allow traces to contain backedges, and traces are truncated where they would leave a loop, as seen from the center block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161003 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify invalidation strategy in comment.Jakob Stoklund Olesen2012-07-301-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160997 91177308-0d34-0410-b5e6-96231b3b80d8
* Assert that all trace candidate blocks have been visited by the PO.Jakob Stoklund Olesen2012-07-301-11/+6
| | | | | | | | | | When computing a trace, all the candidates for pred/succ must have been visited. Filter out back-edges first, though. The PO traversal ignores them. Thanks to Andy for spotting this in review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160995 91177308-0d34-0410-b5e6-96231b3b80d8
* Hook into PassManager's analysis verification.Jakob Stoklund Olesen2012-07-303-7/+4
| | | | | | | By overriding Pass::verifyAnalysis(), the pass contents will be verified by the pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160994 91177308-0d34-0410-b5e6-96231b3b80d8
* Consider address spaces for hashing and CSEing DAG nodes. Otherwise two ↵Pete Cooper2012-07-301-0/+22
| | | | | | loads from different x86 segments but the same address would get CSEd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineInstr::isTransient().Jakob Stoklund Olesen2012-07-301-23/+1
| | | | | | | | | | | This is a cleaned up version of the isFree() function in MachineTraceMetrics.cpp. Transient instructions are very unlikely to produce any code in the final output. Either because they get eliminated by RegisterCoalescing, or because they are pseudo-instructions like labels and debug values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160977 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineTraceMetrics::verify().Jakob Stoklund Olesen2012-07-303-11/+55
| | | | | | | This function verifies the consistency of cached data in the MachineTraceMetrics analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160976 91177308-0d34-0410-b5e6-96231b3b80d8
* Verify that the CFG hasn't changed during invalidate().Jakob Stoklund Olesen2012-07-301-2/+12
| | | | | | | The MachineTraceMetrics analysis must be invalidated before modifying the CFG. This will catch some of the violations of that rule. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160969 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineBasicBlock::isPredecessor().Jakob Stoklund Olesen2012-07-301-2/+5
| | | | | | | | A->isPredecessor(B) is the same as B->isSuccessor(A), but it can tolerate a B that is null or dangling. This shouldn't happen normally, but it it useful for verification code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160968 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-22/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+22
| | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable a basic SSA DAG builder optimization.Andrew Trick2012-07-281-5/+4
| | | | | | Jakob fixed ProcessImplicifDefs in r159149. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160910 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more debug output to MachineTraceMetrics.Jakob Stoklund Olesen2012-07-273-3/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160905 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep track of the head and tail of the trace through each block.Jakob Stoklund Olesen2012-07-272-4/+18
| | | | | | | This makes it possible to quickly detect blocks that are outside the trace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160904 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a DW_AT_high_pc for CUs that are a single address range. UpdateEric Christopher2012-07-272-6/+24
| | | | | | | | | | all tests accordingly. Fixes PR13351. Patch by shinichiro hamaji! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160899 91177308-0d34-0410-b5e6-96231b3b80d8
* Also compute register mask lists under -new-live-intervals.Jakob Stoklund Olesen2012-07-271-8/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160898 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate the IS_PHI_DEF flag and VNInfo::setIsPHIDef().Jakob Stoklund Olesen2012-07-274-8/+2
| | | | | | | | A value number is a PHI def if and only if it begins at a block boundary. This can be derived from the def slot, a separate flag is not necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160893 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a -new-live-intervals experimental option.Jakob Stoklund Olesen2012-07-271-1/+36
| | | | | | | | | This option replaces the existing live interval computation with one based on LiveRangeCalc.cpp. The new algorithm does not depend on LiveVariables, and it can be run at any time, before or after leaving SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160892 91177308-0d34-0410-b5e6-96231b3b80d8
* Add <imp-def> of super-register when lowering SUBREG_TO_REG.Jakob Stoklund Olesen2012-07-271-4/+7
| | | | | | Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160888 91177308-0d34-0410-b5e6-96231b3b80d8
* Use an otherwise unused variable.Jakob Stoklund Olesen2012-07-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160798 91177308-0d34-0410-b5e6-96231b3b80d8
* Start scaffolding for a MachineTraceMetrics analysis pass.Jakob Stoklund Olesen2012-07-264-1/+726
| | | | | | | | | | | | | | | | | | | | | | | | This is still a work in progress. Out-of-order CPUs usually execute instructions from multiple basic blocks simultaneously, so it is necessary to look at longer traces when estimating the performance effects of code transformations. The MachineTraceMetrics analysis will pick a typical trace through a given basic block and provide performance metrics for the trace. Metrics will include: - Instruction count through the trace. - Issue count per functional unit. - Critical path length, and per-instruction 'slack'. These metrics can be used to determine the performance limiting factor when executing the trace, and how it will be affected by a code transformation. Initially, this will be used by the early if-conversion pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160796 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a floor intrinsic.Dan Gohman2012-07-261-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160791 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable rematerialization in TwoAddressInstructionPass.Manman Ren2012-07-251-78/+6
| | | | | | | | | | | | It is redundant; RegisterCoalescer will do the remat if it can't eliminate the copy. Collected instruction counts before and after this. A few extra instructions are generated due to spilling but it is normal to see these kinds of changes with almost any small codegen change, according to Jakob. This also fixed rdar://11830760 where xor is expected instead of movi0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160749 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve 2-addr constraints in ConnectedVNInfoEqClasses.Jakob Stoklund Olesen2012-07-251-7/+4
| | | | | | | | | | | | | | | | | | | | When a live range splits into multiple connected components, we would arbitrarily assign <undef> uses to component 0. This is wrong when the use is tied to a def that gets assigned to a different component: %vreg69<def> = ADD8ri %vreg68<undef>, 1 The use and def must get the same virtual register. Fix this by assigning <undef> uses to the same component as the value defined by the instruction, if any: %vreg69<def> = ADD8ri %vreg69<undef>, 1 This fixes PR13402. The PR has a test case which I am not including because it is unlikely to keep exposing this behavior in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160739 91177308-0d34-0410-b5e6-96231b3b80d8
* Verify two-address constraints more carefully.Jakob Stoklund Olesen2012-07-251-14/+7
| | | | | | Include <undef> operands and virtual registers after leaving SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160734 91177308-0d34-0410-b5e6-96231b3b80d8
* Change llvm_unreachable in SplitVectorOperand to report_fatal_error. Keeps ↵Craig Topper2012-07-241-1/+3
| | | | | | release builds from crashing if code uses an intrinsic with an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160661 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo (the the => the)Sylvestre Ledru2012-07-232-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160621 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed DAGCombine optimizations which generate select_cc for targetsNadav Rotem2012-07-231-33/+47
| | | | | | | | | | | | that do not support it (X86 does not lower select_cc). PR: 13428 Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160619 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Fix indentation and remove trailing whitespace.Craig Topper2012-07-231-16/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160617 91177308-0d34-0410-b5e6-96231b3b80d8
* Change llvm_unreachable in SplitVectorResult to report_fatal_error. Keeps ↵Craig Topper2012-07-231-1/+2
| | | | | | release builds from crashing if code uses an intrinsic with an illegal type. For instance 256-bit AVX intrinsics without having AVX enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160616 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused private member variables uncovered by the recent changes to ↵Benjamin Kramer2012-07-203-16/+2
| | | | | | clang's -Wunused-private-field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160583 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid folding loads that are unsafe to move.Jakob Stoklund Olesen2012-07-201-0/+13
| | | | | | | | | | LiveRangeEdit::foldAsLoad() can eliminate a register by folding a load into its only use. Only do that when the load is safe to move, and it won't extend any live ranges. This fixes PR13414. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160575 91177308-0d34-0410-b5e6-96231b3b80d8
* Split loop exiting edges more aggressively.Jakob Stoklund Olesen2012-07-201-13/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PHIElimination splits critical edges when it predicts it can resolve interference and eliminate copies. It doesn't split the edge if the interference wouldn't be resolved anyway because the phi-use register is live in the critical edge anyway. Teach PHIElimination to split loop exiting edges with interference, even if it wouldn't resolve the interference. This removes the necessary copies from the loop, which is still an improvement from injecting the copies into the loop. The test case demonstrates the improvement. Before: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx movl %esi, %eax je LBB0_1 After: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx je LBB0_1 movl %esi, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160571 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix crash in machine verifier when trying to print the def of a register ↵Pete Cooper2012-07-191-0/+2
| | | | | | which has no def git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160531 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some explicit compare loops with std::equal.Benjamin Kramer2012-07-191-7/+1
| | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160501 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed few warnings.Galina Kistanova2012-07-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160493 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tabs.Bill Wendling2012-07-198-28/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160475 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a somewhat nasty crasher in PR13378. This crashes inside ofChandler Carruth2012-07-181-22/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LiveIntervals due to the two-addr pass generating bogus MI code. The crux of the issue was a loop nesting problem. The intent of the code which attempts to transform instructions before converting them to two-addr form is to defer and reprocess any transformed instructions as the second processing is likely to have more opportunities to coalesce copies, etc. Unfortunately, there was one section of processing that was not deferred -- the INSERT_SUBREG rewriting. Due to quirks of how this rewriting proceeded, not only did it occur early, it removed the bits of information needed for the deferred processing to correctly generate the necessary two address form (specifically inserting a copy), but didn't trigger any immediate assertions and produced what appeared to be already valid two-address from code. Thus, the assertion only fired much later in the pipeline. The fix is to hoist the transformation logic up layer to where it can more firmly defer all further processing, and to teach the normal processing to handle an edge case previously handled as part of the transformation logic. This edge case (already matched tied register operands) needs to *not* defer any steps. As has been brought up repeatedly in the process: wow does this code need refactoring. I *may* squeeze in some time to at least bring sanity to this loop... but wow... =] Thanks to Jakob for helpful hints on the way here, and the review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160443 91177308-0d34-0410-b5e6-96231b3b80d8
* ignore 'invoke @llvm.donothing', but still keep the edge to the continuation BBNuno Lopes2012-07-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160411 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out r160101 and instead implement a dag combine to recover from ↵Evan Cheng2012-07-171-0/+28
| | | | | | instcombine transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160387 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some trace output to TwoAddressInstructionPass.Jakob Stoklund Olesen2012-07-171-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160380 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused variable.Benjamin Kramer2012-07-171-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160372 91177308-0d34-0410-b5e6-96231b3b80d8
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