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* Disable fancy splitting during spilling unless -extra-spiller-splits is given.Jakob Stoklund Olesen2010-11-041-8/+18
| | | | | | | | This way, InlineSpiller does the same amount of splitting as the standard spiller. Splitting should really be guided by the register allocator, and doesn't belong in the spiller at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118216 91177308-0d34-0410-b5e6-96231b3b80d8
* Just return undef for invalid masks or elts, and since we're doing that,Eric Christopher2010-11-031-5/+6
| | | | | | | just do it earlier too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
* Let RegAllocBasic require MachineDominators - they are already available andJakob Stoklund Olesen2010-11-031-0/+3
| | | | | | splitting needs them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118194 91177308-0d34-0410-b5e6-96231b3b80d8
* Tag debug output as regallocJakob Stoklund Olesen2010-11-032-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118193 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands2010-11-032-7/+5
| | | | | | | | with a SimpleValueType, while an EVT supports equality and inequality comparisons with SimpleValueType. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
* Inside the calling convention logic LocVT is always a simpleDuncan Sands2010-11-032-18/+18
| | | | | | | | | | | value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
* If we have an undef mask our Elt will be -1 for our access, handleEric Christopher2010-11-031-3/+7
| | | | | | | | | this by using an undef as a pointer. Fixes rdar://8625016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix DAGCombiner to avoid going into an infinite loop when itDan Gohman2010-11-031-1/+36
| | | | | | | | encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff). This fixes rdar://8606584. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-034-30/+56
| | | | | | | | | | | | | | 1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to "optimize for latency". Call instructions don't have the right latency and this is more likely to use introduce spills. 2. Fix if-converter cost function. For ARM, it should use instruction latencies, not # of micro-ops since multi-latency instructions is completely executed even when the predicate is false. Also, some instruction will be "slower" when they are predicated due to the register def becoming implicit input. rdar://8598427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes <rdar://problem/8612856>: During postRAsched, the antidependenceAndrew Trick2010-11-022-11/+35
| | | | | | | | breaker needs to check all definitions of the antidepenent register to avoid multiple defs of the same new register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118032 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify.Devang Patel2010-11-021-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118027 91177308-0d34-0410-b5e6-96231b3b80d8
* If value map does not have register for an argument then try to find frame ↵Devang Patel2010-11-021-5/+8
| | | | | | index before giving up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8
* Use frameindex, if available, as a last resort to emit debug info for a ↵Devang Patel2010-11-021-2/+13
| | | | | | parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to split weird critical edges that really aren't:Jakob Stoklund Olesen2010-11-021-2/+12
| | | | | | | | | | | | | | | BB#1: derived from LLVM BB %bb.nph28 Live Ins: %AL Predecessors according to CFG: BB#0 TEST8rr %reg16384<kill>, %reg16384, %EFLAGS<imp-def>; GR8:%reg16384 JNE_4 <BB#2>, %EFLAGS<imp-use,kill> JMP_4 <BB#2> Successors according to CFG: BB#2 BB#2 These double CFG edges only ever occur in bugpoint-generated code, so there is no need to attempt something clever. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117992 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineLICM should not claim to be preserving the CFG when it can split criticalJakob Stoklund Olesen2010-11-011-1/+0
| | | | | | edges on demand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117982 91177308-0d34-0410-b5e6-96231b3b80d8
* Be more precise about verifying missing kill flags.Jakob Stoklund Olesen2010-11-011-2/+4
| | | | | | | It is legal for an instruction to have two operands using the same register, only one a kill. This is interpreted as a kill. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117981 91177308-0d34-0410-b5e6-96231b3b80d8
* When inserting copies during splitting, always use the parent register as theJakob Stoklund Olesen2010-11-012-19/+16
| | | | | | | | | | | | source, and let rewrite() clean it up. This way, kill flags on the inserted copies are fixed as well during rewrite(). We can't just assume that all the copies we insert are going to be kills since critical edges into loop headers sometimes require both source and dest to be live out of a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117980 91177308-0d34-0410-b5e6-96231b3b80d8
* Add kill flag verification.Jakob Stoklund Olesen2010-11-011-2/+13
| | | | | | | | At least X86FloatingPoint requires correct kill flags after register allocation, and targets using register scavenging benefit. Conservative kill flags are not enough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117960 91177308-0d34-0410-b5e6-96231b3b80d8
* Update kill flags while rewriting instructions after splitting.Jakob Stoklund Olesen2010-11-011-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117959 91177308-0d34-0410-b5e6-96231b3b80d8
* When we look at instructions to convert to setting the 's' flag, we need to lookBill Wendling2010-11-011-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | at more than those which define CPSR. You can have this situation: (1) subs ... (2) sub r6, r5, r4 (3) movge ... (4) cmp r6, 0 (5) movge ... We cannot convert (2) to "subs" because (3) is using the CPSR set by (1). There's an analogous situation here: (1) sub r1, r2, r3 (2) sub r4, r5, r6 (3) cmp r4, ... (5) movge ... (6) cmp r1, ... (7) movge ... We cannot convert (1) to "subs" because of the intervening use of CPSR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't assign new registers created during a split to the same stack slot, butJakob Stoklund Olesen2010-11-013-16/+3
| | | | | | give them individual stack slots once the are actually spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117945 91177308-0d34-0410-b5e6-96231b3b80d8
* Add basic LiveStacks verification.Jakob Stoklund Olesen2010-11-011-0/+20
| | | | | | | When an instruction refers to a spill slot with a LiveStacks entry, check that the spill slot is live at the instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117944 91177308-0d34-0410-b5e6-96231b3b80d8
* The testcase is now XFAILed. Sorry about the breakage.Bill Wendling2010-11-011-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117904 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r117876 for now, it's causing more testsuite failures.Eric Christopher2010-10-311-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117879 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable the peephole optimizer until 186.crafty on armv6 is fixed. This is whatBill Wendling2010-10-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | looks like is happening: Without the peephole optimizer: (1) sub r6, r6, #32 orr r12, r12, lr, lsl r9 orr r2, r2, r3, lsl r10 (x) cmp r6, #0 ldr r9, LCPI2_10 ldr r10, LCPI2_11 (2) sub r8, r8, #32 (a) movge r12, lr, lsr r6 (y) cmp r8, #0 LPC2_10: ldr lr, [pc, r10] (b) movge r2, r3, lsr r8 With the peephole optimizer: ldr r9, LCPI2_10 ldr r10, LCPI2_11 (1*) subs r6, r6, #32 (2*) subs r8, r8, #32 (a*) movge r12, lr, lsr r6 (b*) movge r2, r3, lsr r8 (1) is used by (x) for the conditional move at (a). (2) is used by (y) for the conditional move at (b). After the peephole optimizer, these the flags resulting from (1*) are ignored and only the flags from (2*) are considered for both conditional moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117876 91177308-0d34-0410-b5e6-96231b3b80d8
* Attach a GCModuleInfo to a MachineFunction.Nicolas Geoffray2010-10-312-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117867 91177308-0d34-0410-b5e6-96231b3b80d8
* Include MachineBasicBlock numbers in viewCFG() output.Jakob Stoklund Olesen2010-10-301-8/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117765 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure copies are inserted after any exception handling labels at the top ofJakob Stoklund Olesen2010-10-301-1/+1
| | | | | | a basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117764 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is neededJakob Stoklund Olesen2010-10-301-0/+7
| | | | | | elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117763 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable more of physical register live intervals verification.Jakob Stoklund Olesen2010-10-301-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117762 91177308-0d34-0410-b5e6-96231b3b80d8
* Print out register class of spilled register.Jakob Stoklund Olesen2010-10-301-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117761 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine cse to eliminate instructions with multiple physreg uses and ↵Evan Cheng2010-10-291-50/+45
| | | | | | defs. rdar://8610857. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove DAG combiner patch to fold vector splats. Instcombiner does it now.Bob Wilson2010-10-291-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix sign error.Jakob Stoklund Olesen2010-10-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117677 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoiding overly aggressive latency scheduling. If the two nodes share anEvan Cheng2010-10-292-24/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | operand and one of them has a single use that is a live out copy, favor the one that is live out. Otherwise it will be difficult to eliminate the copy if the instruction is a loop induction variable update. e.g. BB: sub r1, r3, #1 str r0, [r2, r3] mov r3, r1 cmp bne BB => BB: str r0, [r2, r3] sub r3, r3, #1 cmp bne BB This fixed the recent 256.bzip2 regression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't transfer unused values to the new intervals formed by splitting.Jakob Stoklund Olesen2010-10-291-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117673 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence Release build warnings.Benjamin Kramer2010-10-291-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117671 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ConnectedVNInfoEqClasses::Classify to deal with unused values.Jakob Stoklund Olesen2010-10-291-1/+15
| | | | | | | | We don't want unused values forming their own equivalence classes, so we lump them all together in one class, and then merge them with the class of the last used value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117670 91177308-0d34-0410-b5e6-96231b3b80d8
* Never propagate the idom value out of a block that defines its own value.Jakob Stoklund Olesen2010-10-291-3/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117669 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline asm multiple alternative constraints development phase 2 - improved ↵John Thompson2010-10-293-47/+77
| | | | | | basic logic, added initial platform support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
* This may be an ARM target, so check for _Unwind_SjLj_Resume.Bill Wendling2010-10-291-11/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117643 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken equivalence class calculation. We could probably also useJakob Stoklund Olesen2010-10-291-11/+8
| | | | | | | EquvivalenceClasses.h except it looks like overkill when elements are continuous integers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117631 91177308-0d34-0410-b5e6-96231b3b80d8
* Print out the connected components in the verifier after complaining about theirJakob Stoklund Olesen2010-10-291-0/+8
| | | | | | multiplicity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117630 91177308-0d34-0410-b5e6-96231b3b80d8
* Run a verification pass before any splitting to better distribute blame.Jakob Stoklund Olesen2010-10-291-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117629 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore empty blocks.Devang Patel2010-10-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117615 91177308-0d34-0410-b5e6-96231b3b80d8
* One day, physical register live ranges will be sensible.Jakob Stoklund Olesen2010-10-281-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117602 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace SplitKit SSA update with an iterative algorithm very similar to the oneJakob Stoklund Olesen2010-10-282-88/+181
| | | | | | | | | | | | | | | | in SSAUpdaterImpl.h Verifying live intervals revealed that the old method was completely wrong, and we need an iterative approach to calculating PHI placemant. Fortunately, we have MachineDominators available, so we don't have to compute that over and over like SSAUpdaterImpl.h must. Live-out values are cached between calls to mapValue() and computed in a greedy way, so most calls will be working with very small block sets. Thanks to Bob for explaining how this should work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117599 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MachineDominators available for SplitEditor. We are going to need it forJakob Stoklund Olesen2010-10-284-8/+21
| | | | | | | | | proper SSA updating. This doesn't cause MachineDominators to be recomputed since we are already requiring MachineLoopInfo which uses dominators as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117598 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a temporary command line option to verify machine code after each spill orJakob Stoklund Olesen2010-10-281-0/+6
| | | | | | split. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117597 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not work too hard to find type's file info. There is a special field to ↵Devang Patel2010-10-281-2/+2
| | | | | | record file info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117588 91177308-0d34-0410-b5e6-96231b3b80d8
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