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* Use SuperRegClassIterator for findRepresentativeClass().Jakob Stoklund Olesen2012-05-041-26/+15
| | | | | | | | The masks returned by SuperRegClassIterator are computed automatically by TableGen. This is better than depending on the manually specified SuperRegClasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156147 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix two-address pass's aggressive instruction commuting heuristics. It's meantEvan Cheng2012-05-031-15/+16
| | | | | | | | | | | | | | | | | | | | | | | to catch cases like: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 By commuting ADD, it let coalescer eliminate all of the copies. However, there was a bug in the heuristics where it ended up commuting the ADD in: %reg1024<def> = MOV r0 %reg1025<def> = MOV 0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 That did no benefit but rather ensure the last MOV would not be coalesced. rdar://11355268 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156048 91177308-0d34-0410-b5e6-96231b3b80d8
* Added TargetRegisterInfo::getAllocatableClass.Andrew Trick2012-05-032-7/+12
| | | | | | | | | | The ensures that virtual registers always belong to an allocatable class. If your target attempts to create a vreg for an operand that has no allocatable register subclass, you will crash quickly. This ensures that targets define register classes as intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, ↵Owen Anderson2012-05-021-0/+18
| | | | | | just like it now knows for FMULs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach DAG combine that multiplication by 1.0 can always be constant folded.Owen Anderson2012-05-021-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Naming conventions.Jim Grosbach2012-05-011-16/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155960 91177308-0d34-0410-b5e6-96231b3b80d8
* Use dyn_cast instead of checking opcode and cast.Jakub Staszak2012-05-011-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8
* Strip the pointer casts off of allocas so that the selection DAG can find them.Bill Wendling2012-05-011-1/+1
| | | | | | | PR10799 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8
* Target independent Hexagon Packetizer fix.Sirish Pande2012-05-011-55/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155947 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-21/+21
| | | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some constantness. No functionality change.Jakub Staszak2012-04-301-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8
* RegisterPressure: ArrayRefize some functions for better readability. No ↵Benjamin Kramer2012-04-292-38/+40
| | | | | | functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155795 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't update spill weights when joining intervals.Jakob Stoklund Olesen2012-04-281-25/+0
| | | | | | We don't compute spill weights until after coalescing anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155766 91177308-0d34-0410-b5e6-96231b3b80d8
* Spring cleaning - Delete dead code.Jakob Stoklund Olesen2012-04-281-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155765 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick2012-04-281-26/+58
| | | | | | | | | | This time, also fix the caller of AddGlue to properly handle incomplete chains. AddGlue had failure modes, but shamefully hid them from its caller. It's luck ran out. Fixes rdar://11314175: BuildSchedUnits assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155749 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r155668: Fix the SD scheduler to avoid gluing.Andrew Trick2012-04-271-4/+2
| | | | | | This definitely caused regression with ARM -mno-thumb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155743 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick2012-04-261-3/+5
| | | | | | | | | | | DAGCombine strangeness may result in multiple loads from the same offset. They both may try to glue themselves to another load. We could insist that the redundant loads glue themselves to each other, but the beter fix is to bail out from bad gluing at the time we detect it. Fixes rdar://11314175: BuildSchedUnits assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155668 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more dead code.Jakob Stoklund Olesen2012-04-251-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155566 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -disable-cross-class-join option.Jakob Stoklund Olesen2012-04-251-13/+4
| | | | | | | | Cross-class joins have been normal and fully supported for a while now. With TableGen generating the getMatchingSuperRegClass() hook, they are unlikely to cause problems again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155552 91177308-0d34-0410-b5e6-96231b3b80d8
* Cross-class joining is winning.Jakob Stoklund Olesen2012-04-251-66/+0
| | | | | | | | | | | | Remove the heuristic for disabling cross-class joins. The greedy register allocator can handle the narrow register classes, and when it splits a live range, it can pick a larger register class. Benchmarks were unaffected by this change. <rdar://problem/11302212> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155551 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a naughty header include that breaks "installed" builds.Andrew Trick2012-04-241-2/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155486 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and ↵Evan Cheng2012-04-241-0/+5
| | | | | | refuse to break edge to EH landing pad. rdar://11300144 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155470 91177308-0d34-0410-b5e6-96231b3b80d8
* cmake: new fileAndrew Trick2012-04-241-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155460 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: DAG builder must special case earlyclobberAndrew Trick2012-04-241-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155459 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: try (not too hard) to place debug values where they belongAndrew Trick2012-04-241-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155458 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: ignore debug values during schedulingAndrew Trick2012-04-241-6/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155457 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: DAG builder support for tracking register pressure within the ↵Andrew Trick2012-04-242-5/+58
| | | | | | | | | current scheduling region. The DAG builder is a convenient place to do it. Hopefully this is more efficient than a separate traversal over the same region. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155456 91177308-0d34-0410-b5e6-96231b3b80d8
* RegisterPressure: A utility for computing register pressure within aAndrew Trick2012-04-242-0/+718
| | | | | | | | | | | | | | | | | | MachineInstr sequence. This uses the new target interface for tracking register pressure using pressure sets to model overlapping register classes and subregisters. RegisterPressure results can be tracked incrementally or stored at region boundaries. Global register pressure can be deduced from local RegisterPressure results if desired. This is an early, somewhat untested implementation. I'm working on testing it within the context of a register pressure reducing MachineScheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155454 91177308-0d34-0410-b5e6-96231b3b80d8
* Look for the 'Is Simulated' module flag. This indicates that the program is ↵Bill Wendling2012-04-241-4/+5
| | | | | | compiled to run on a simulator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155435 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-232-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r155364 until the upstream review can complete, perChandler Carruth2012-04-231-36/+55
| | | | | | the stated developer policy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155373 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon Packetizer's target independent fix.Sirish Pande2012-04-231-55/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155364 91177308-0d34-0410-b5e6-96231b3b80d8
* ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2Elena Demikhovsky2012-04-221-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach getVectorTypeBreakdown about promotion of vectors in addition to ↵Nadav Rotem2012-04-211-3/+6
| | | | | | widening of vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR12599.Jakob Stoklund Olesen2012-04-201-1/+6
| | | | | | | | The X86 target is editing the selection DAG while isel is selecting nodes following a topological ordering. When the DAG hacking triggers CSE, nodes can be deleted and bad things happen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
* Make ISelPosition a local variable.Jakob Stoklund Olesen2012-04-201-8/+25
| | | | | | | | | Now that multiple DAGUpdateListeners can be active at the same time, ISelPosition can become a local variable in DoInstructionSelection. We simply register an ISelUpdater with CurDAG while ISelPosition exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
* Register DAGUpdateListeners with SelectionDAG.Jakob Stoklund Olesen2012-04-206-119/+87
| | | | | | | | | | | | | | | Instead of passing listener pointers to RAUW, let SelectionDAG itself keep a linked list of interested listeners. This makes it possible to have multiple listeners active at once, like RAUWUpdateListener was already doing. It also makes it possible to register listeners up the call stack without controlling all RAUW calls below. DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG list of active listeners. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
* Print <def,read-undef> to avoid confusion.Jakob Stoklund Olesen2012-04-201-1/+5
| | | | | | | | The <undef> flag on a def operand only applies to partial register redefinitions. Only print the flag when relevant, and print it as <def,read-undef> to make it clearer what it means. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155239 91177308-0d34-0410-b5e6-96231b3b80d8
* New and improved comment.Andrew Trick2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155229 91177308-0d34-0410-b5e6-96231b3b80d8
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-202-3/+3
| | | | | | | | | | | | | | | | | | | This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: initialize BBAndrew Trick2012-04-201-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155226 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow targets to select the default scheduler by name.Andrew Trick2012-04-191-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155090 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-181-34/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
* LiveIntervalUpdate validators weren't recorded after the calls to ↵Pete Cooper2012-04-181-6/+6
| | | | | | std::for_each. Turns out std::for_each doesn't update the variable passed in for the functor but instead copy constructs a new one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155041 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes a problem in instruction selection with testing whether or not the Joel Jones2012-04-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | transformation: (X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2 should be done. This change has been tested: Using a debug+asserts build: on the specific test case that brought this bug to light make check-all lnt nt using this clang to build a release version of clang Using the release+asserts clang-with-clang build: on the specific test case that brought this bug to light make check-all lnt nt Checking in because Evan wants it checked in. Test case forthcoming after scrubbing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154955 91177308-0d34-0410-b5e6-96231b3b80d8
* SlotIndexes used to store the index list in a crufty custom linked-list. I can'tLang Hames2012-04-171-27/+25
| | | | | | | | | | | | for the life of me remember why I wrote it this way, but I can't see any good reason for it now. This patch replaces the custom linked list with an ilist. This change should preserve the existing numberings exactly, so no generated code should change (if it does, file a bug!). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154904 91177308-0d34-0410-b5e6-96231b3b80d8
* Make comment here more clear.Eric Christopher2012-04-161-3/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154878 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix updateTerminator to be resiliant to degenerate terminators whereChandler Carruth2012-04-161-7/+29
| | | | | | | | | | | | | | | | | | | | | both fallthrough and a conditional branch target the same successor. Gracefully delete the conditional branch and introduce any unconditional branch needed to reach the actual successor. This fixes memory corruption in 2009-06-15-RegScavengerAssert.ll and possibly other tests. Also, while I'm here fix a latent bug I spotted by inspection. I never applied the same fundamental fix to this fallthrough successor finding logic that I did to the logic used when there are no conditional branches. As a consequence it would have selected landing pads had they be aligned in just the right way here. I don't have a test case as I spotted this by inspection, and the previous time I found this required have of TableGen's source code to produce it. =/ I hate backend bugs. ;] Thanks to Jim Grosbach for helping me reason through this and reviewing the fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154867 91177308-0d34-0410-b5e6-96231b3b80d8
* Flip the new block-placement pass to be on by default.Chandler Carruth2012-04-161-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154816 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a somewhat hacky heuristic to do something different from whole-loopChandler Carruth2012-04-161-3/+78
| | | | | | | | | | | | | rotation. When there is a loop backedge which is an unconditional branch, we will end up with a branch somewhere no matter what. Try placing this backedge in a fallthrough position above the loop header as that will definitely remove at least one branch from the loop iteration, where whole loop rotation may not. I haven't seen any benchmarks where this is important but loop-blocks.ll tests for it, and so this will be covered when I flip the default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154812 91177308-0d34-0410-b5e6-96231b3b80d8
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