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* Make addPred and removePred return void, since the return value is notDan Gohman2008-12-162-8/+8
| | | | | | | currently used by anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
* This getEdgeAttributes doesn't need a template argument.Dan Gohman2008-12-161-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61065 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for splitting and scalarizing vector shifts.Mon P Wang2008-12-152-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61050 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix printing of PseudoSourceValues in SDNode graphs.Dan Gohman2008-12-151-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support to LegalizeType for expanding the operands of scalar to vectorMon P Wang2008-12-153-9/+57
| | | | | | | | and insert vector element. Modified extract vector element to extend the result to match the expected promoted type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r60997, this time without forgetting thatDuncan Sands2008-12-142-7/+14
| | | | | | | | target constants are allowed to have an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r60997. It was causing this failure:Bill Wendling2008-12-132-10/+7
| | | | | | | | | | | | | | | | | | | | | | Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738 Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493. 0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98 1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593 2 libSystem.B.dylib 0x96cac09b _sigtramp + 43 3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359 4 libSystem.B.dylib 0x96d24ec2 raise + 26 5 libSystem.B.dylib 0x96d3447f abort + 73 6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101 7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
* LegalizeDAG is not supposed to introduce illegalDuncan Sands2008-12-132-7/+10
| | | | | | | | types into the DAG if they were not already there. Check this with an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove assertion to allow promotion of a truncating store operandMon P Wang2008-12-131-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
* Added basic support for expanding VSETCCMon P Wang2008-12-131-2/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
* On big-endian machines it is wrong to do a fullDuncan Sands2008-12-131-19/+22
| | | | | | | | | | | width register load followed by a truncating store for the copy, since the load will not place the value in the lower bits. Probably partial loads/stores can never happen here, but fix it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not print empty DW_AT_comp_dir.Devang Patel2008-12-121-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60965 91177308-0d34-0410-b5e6-96231b3b80d8
* When expanding unaligned loads and stores do not makeDuncan Sands2008-12-121-34/+123
| | | | | | | | | | | | | | | | | | | | | | | | | use of illegal integer types: instead, use a stack slot and copying via integer registers. The existing code is still used if the bitconvert is to a legal integer type. This fires on the PPC testcases 2007-09-08-unaligned.ll and vec_misaligned.ll. It looks like equivalent code is generated with these changes, just permuted, but it's hard to tell. With these changes, nothing in LegalizeDAG produces illegal integer types anymore. This is a prerequisite for removing the LegalizeDAG type legalization code. While there I noticed that the existing code doesn't handle trunc store of f64 to f32: it turns this into an i64 store, which represents a 4 byte stack smash. I added a FIXME about this. Hopefully someone more motivated than I am will take care of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60964 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix add/sub expansion: don't create ADD / SUB with two results (seems like ↵Evan Cheng2008-12-121-5/+5
| | | | | | everyone is doing this these days :-). Patch by Daniel M Gessel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60958 91177308-0d34-0410-b5e6-96231b3b80d8
* When using a 4 byte jump table on a 64 bit machine,Duncan Sands2008-12-121-11/+3
| | | | | | | | | do an extending load of the 4 bytes rather than a potentially illegal (type) i32 load followed by a sign extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60945 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for SELECT v8i8 v4i16 for X86 (MMX)Mon P Wang2008-12-121-0/+4
| | | | | | | Added support for TRUNC v8i16 to v8i8 for X86 (MMX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
* Redo the arithmetic with overflow architecture. I was changing the semantics ofBill Wendling2008-12-121-15/+0
| | | | | | | | | | | | | ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace the intrinsic with an ISD::SADDO node. Then custom lower that into an X86ISD::ADD node with a associated SETCC that checks the correct condition code (overflow or carry). Then that gets lowered into the correct X86::ADDOvf instruction. Similar for SUB and MUL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid generating a convert_rndsat node when the src and dest type are the same.Mon P Wang2008-12-111-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60869 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify FIXME.Bill Wendling2008-12-111-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace clean up (tabs with spaces)Mon P Wang2008-12-111-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60866 91177308-0d34-0410-b5e6-96231b3b80d8
* Make fix for r60829 less conservative to allow the proper optimization forMon P Wang2008-12-111-2/+9
| | | | | | | vec_extract-sse4.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a newline after this debug output.Bill Wendling2008-12-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60861 91177308-0d34-0410-b5e6-96231b3b80d8
* If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation onBill Wendling2008-12-101-0/+15
| | | | | | | | them. The DAG combiner expects that nodes that are transformed have one value result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
* For amusement, implement SADDO, SSUBO, UADDO, USUBODuncan Sands2008-12-102-19/+80
| | | | | | | | | | for promoted integer types, eg: i16 on ppc-32, or i24 on any platform. Complete support for arbitrary precision integers would require handling expanded integer types, eg: i128, but I couldn't be bothered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug when trying to optimize a extract vector element of aMon P Wang2008-12-101-1/+2
| | | | | | | bit convert that changes the number of elements of a shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids ↵Evan Cheng2008-12-102-11/+11
| | | | | | some overflow issues. Patch by Thomas Jablin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace changes.Bill Wendling2008-12-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace fixes.Bill Wendling2008-12-101-14/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60818 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CalcLatency to work in terms of edge latencies, rather thanDan Gohman2008-12-101-26/+5
| | | | | | | | | node latencies. Use CalcLatency instead of manual code in CalculatePriorities to keep it consistent. Previously it computed slightly different results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60817 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple of Dwarf bugs.Evan Cheng2008-12-102-8/+22
| | | | | | | | - Emit DW_AT_byte_size for struct and union of size zero. - Emit DW_AT_declaration for forward type declaration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60812 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite the SDep class, and simplify some of the related code.Dan Gohman2008-12-099-303/+318
| | | | | | | | | | | | | | | | | | The Cost field is removed. It was only being used in a very limited way, to indicate when the scheduler should attempt to protect a live register, and it isn't really needed to do that. If we ever want the scheduler to start inserting copies in non-prohibitive situations, we'll have to rethink some things anyway. A Latency field is added. Instead of giving each node a single fixed latency, each edge can have its own latency. This will eventually be used to model various micro-architecture properties more accurately. The PointerIntPair class and an internal union are now used, which reduce the overall size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor code simplification.Dan Gohman2008-12-091-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60804 91177308-0d34-0410-b5e6-96231b3b80d8
* Add sub/mul overflow intrinsics. This currently doesn't have aBill Wendling2008-12-096-25/+87
| | | | | | | | target-independent way of determining overflow on multiplication. It's very tricky. Patch by Zoltan Varga! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR3117: not all nodes being legalized. TheDuncan Sands2008-12-097-207/+467
| | | | | | | | | | | | | | | | | | | | | | | | essential problem was that the DAG can contain random unused nodes which were never analyzed. When remapping a value of a node being processed, such a node may become used and need to be analyzed; however due to operands being transformed during analysis the node may morph into a different one. Users of the morphing node need to be updated, and this wasn't happening. While there I added a bunch of documentation and sanity checks, so I (or some other poor soul) won't have to scratch their head over this stuff so long trying to remember how it was all supposed to work next time some obscure problem pops up! The extra sanity checking exposed a few places where invariants weren't being preserved, so those are fixed too. Since some of the sanity checking is expensive, I added a flag to turn it on. It is also turned on when building with ENABLE_EXPENSIVE_CHECKS=1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60797 91177308-0d34-0410-b5e6-96231b3b80d8
* Cosmetic changes.Evan Cheng2008-12-091-6/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60771 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace cleanups.Dan Gohman2008-12-091-12/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60769 91177308-0d34-0410-b5e6-96231b3b80d8
* In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promotingMon P Wang2008-12-091-2/+2
| | | | | | | one of its operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60749 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix getNode to allow a vector for the shift amount for shifts of vectors.Mon P Wang2008-12-092-9/+33
| | | | | | | | | Fix the shift amount when unrolling a vector shift into scalar shifts. Fix problem in getShuffleScalarElt where it assumes that the input of a bit convert must be a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60740 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't charge full latency for an anti-dependence, in this simplisticDan Gohman2008-12-091-3/+7
| | | | | | | pipeline model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60733 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the top-level comments, and fix some 80-column violations.Dan Gohman2008-12-081-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60707 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code for sign-extending/truncating gep indicesDan Gohman2008-12-081-23/+32
| | | | | | | | | | and use it in x86 address mode folding. Also, make getRegForValue return 0 for illegal types even if it has a ValueMap for them, because Argument values are put in the ValueMap. This fixes PR3181. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60696 91177308-0d34-0410-b5e6-96231b3b80d8
* Move createVirtualRegister out-of-line.Dan Gohman2008-12-081-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60684 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify some comments.Dan Gohman2008-12-081-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60683 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch to top-down mode and fix a crasher this exposed caused by an error in theOwen Anderson2008-12-071-1/+11
| | | | | | | live interval updating. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60652 91177308-0d34-0410-b5e6-96231b3b80d8
* Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from ↵Evan Cheng2008-12-051-9/+11
| | | | | | constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60596 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment.Evan Cheng2008-12-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60592 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.Dan Gohman2008-12-054-6/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60586 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach StackSlotColoring to update MachineMemOperands whenDan Gohman2008-12-051-3/+20
| | | | | | | | changing the stack slots on an instruction, to keep them consistent with the actual memory addresses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60584 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore IMPLICIT_DEF instructions when computing physreg liveness.Dan Gohman2008-12-051-0/+7
| | | | | | | | | | | While they appear to provide a normal clobbering def, they don't in the case of the awkward IMPLICIT_DEF+INSERT_SUBREG idiom. It would be good to change INSERT_SUBREG; until then, this change allows post-regalloc scheduling to cope in a mildly conservative way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60583 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out some common code.Owen Anderson2008-12-041-76/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60553 91177308-0d34-0410-b5e6-96231b3b80d8
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