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* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
| | | | | | | | Luis Felipe Strano Moraes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
* We need to pass the TargetMachine object to the InstPrinter if we are printingBill Wendling2011-03-211-1/+2
| | | | | | | | | | the alias of an InstAlias instead of the thing being aliased. Because we need to know the features that are valid for an InstAlias. This is part of a work-in-progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127986 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach2011-03-151-0/+43
| | | | | | | Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the sameJim Grosbach2011-03-121-0/+20
| | | | | | | | actual instruction as the non-Darwin defs, but have different call-clobber semantics and so need separate patterns. They don't need to duplicate the encoding information, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127515 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the ARM 'B' instruction.Jim Grosbach2011-03-111-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach2011-03-111-0/+10
| | | | | | | | effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembler stuff is crazy: for .setfp positive values of offset ↵Anton Korobeynikov2011-03-051-3/+4
| | | | | | corresponds to "add" instruction, not to "sub" as in .pad case git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127106 91177308-0d34-0410-b5e6-96231b3b80d8
* In Thumb1 mode the constant might be materialized via the load from ↵Anton Korobeynikov2011-03-051-2/+16
| | | | | | constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127105 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement frame unwinding information emission for Thumb1. Not finished yet ↵Anton Korobeynikov2011-03-051-3/+11
| | | | | | because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127104 91177308-0d34-0410-b5e6-96231b3b80d8
* Add unwind information emission for thumb stuffAnton Korobeynikov2011-03-051-3/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127103 91177308-0d34-0410-b5e6-96231b3b80d8
* Preliminary support for ARM frame save directives emission via MI flags.Anton Korobeynikov2011-03-051-0/+86
| | | | | | | This is just very first approximation how the stuff should be done (e.g. ARM-only for now). More to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixing a bug when printing fpu text to object file. Patch by Mans Rullgard.Renato Golin2011-03-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126882 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix .fpu printing in ARM assembly, regarding bug ↵Renato Golin2011-02-281-4/+38
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=8931 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126689 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .oJason W Kim2011-02-071-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125025 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework some .ARM.attribute work for improved gcc compatibility.Jason W Kim2011-02-071-13/+50
| | | | | | | | | Unified EmitTextAttribute for both Asm and Obj emission (.cpu only) Added necessary cortex-A8 related attrs for codegen compat tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124995 91177308-0d34-0410-b5e6-96231b3b80d8
* Last round of fixes for movw + movt global address codegen.Evan Cheng2011-01-211-24/+42
| | | | | | | | | | | 1. Fixed ARM pc adjustment. 2. Fixed dynamic-no-pic codegen 3. CSE of pc-relative load of global addresses. It's now enabled by default for Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123991 91177308-0d34-0410-b5e6-96231b3b80d8
* Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng2011-01-171-18/+78
| | | | | | | | | | | | | movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
* JimG sez: "The value-kinds look like masks, but they're not consistently usedJason W Kim2011-01-121-2/+2
| | | | | | | | | | | | | that way, unfortunately. If you want to change them to work additively instead of a one-variant-kind-per-symbolref, that's great and I completely agree it's worth doing, but it really should be a separate patch. Until then, this isn't correct." So I am reverting this bit until a more opportune time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123340 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Support ELF pcrel relocations for movw/movt:Jason W Kim2011-01-121-2/+2
| | | | | | | | | | | R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC. 2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum. 3. Add support for 3 new elf section types (no-ops) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up ARM subtarget code by using Triple ADT.Evan Cheng2011-01-111-3/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
* Model operand restrictions of mul-like instructions on ARMv5 viaAnton Korobeynikov2011-01-011-0/+34
| | | | | | | | | earlyclobber stuff. This should fix PRs 2313 and 8157. Unfortunately, no testcase, since it'd be dependent on register assignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122663 91177308-0d34-0410-b5e6-96231b3b80d8
* r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr toBill Wendling2010-12-181-1/+1
| | | | | | | | | | | | ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting misaligned references to the jump table from an ADR instruction. There is a test case, but unfortunately it's sensitive to random code changes. <rdar://problem/8782223> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122131 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid report_fatal_error in ARM's PrintAsmOperand method.Bob Wilson2010-12-171-1/+1
| | | | | | | The standard error handling in AsmPrinter::EmitInlineAsm handles this much better, so just use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122100 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974Jim Grosbach2010-12-161-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121990 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-6/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor a bit for legibility.Jim Grosbach2010-12-141-28/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121790 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure to propagate the predicate operands for LEApcrel to ADR.Jim Grosbach2010-12-141-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121788 91177308-0d34-0410-b5e6-96231b3b80d8
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-9/+5
| | | | | | | | | | | | | | | | | instruction based on the t_addrmode_s# mode and what it returned. There is some obvious badness to this. In particular, it's hard to do MC-encoding when the instruction may change out from underneath you after the t_addrmode_s# variable is finally resolved. The solution is to revert a long-ago change that merged the reg/reg and reg/imm versions. There is the addition of several new addressing modes. They no longer have extraneous operands associated with them. I.e., if it's reg/reg we don't have to have a dummy zero immediate tacked on to the SDNode. There are some obvious cleanups here, which will happen shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
* Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ↵Owen Anderson2010-12-141-2/+10
| | | | | | | | | much later, which makes the entire process cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121735 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a textual message to the assert.Jim Grosbach2010-12-091-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121349 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really areJim Grosbach2010-12-091-0/+7
| | | | | | referencing the stack pointer as they say they are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121347 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for binary encoding of ARM 'adr' instructions referencing constantJim Grosbach2010-12-021-1/+17
| | | | | | pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADRJim Grosbach2010-12-011-0/+15
| | | | | | | instruction at MC lowering. Add binary encoding information for the ADR, including fixup data for the label operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120594 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the ARMAsmPrinter class defintiion into a header file.Jim Grosbach2010-12-011-94/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120551 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize ARM MOVPCRXJim Grosbach2010-11-301-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120442 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize BX_CALL and friends. Remove dead instruction format classes.Jim Grosbach2010-11-301-0/+53
| | | | | | rdar://8685712 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120438 91177308-0d34-0410-b5e6-96231b3b80d8
* s/ARM::BRIND/ARM::BX/g to coincide with r120366.Bill Wendling2010-11-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120371 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize Thumb2 jump tables with explicit MC lowering to the rawJim Grosbach2010-11-291-11/+41
| | | | | | instructions. This simplifies instruction printing and disassembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120333 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename t2 TBB and TBH instructions to reference that they encode the jump tableJim Grosbach2010-11-291-5/+5
| | | | | | data. Next up, pseudo-izing them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM Pseudo-ize tBR_JTr.Jim Grosbach2010-11-291-13/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos.Jim Grosbach2010-11-291-12/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120303 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the ARM BR_JTadd instruction an explicit pseudo and lower it properlyJim Grosbach2010-11-171-2/+20
| | | | | | in the MC lowering process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119559 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FIXMEs.Jim Grosbach2010-11-151-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119167 91177308-0d34-0410-b5e6-96231b3b80d8
* add fields to the .td files unconditionally, simplifying tblgen a bit.Chris Lattner2010-11-151-1/+1
| | | | | | | | Switch the ARM backend to use 'let' instead of 'set' with this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
* rename LowerToMCInst -> LowerARMMachineInstrToMCInst.Chris Lattner2010-11-141-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119071 91177308-0d34-0410-b5e6-96231b3b80d8
* even more simplifications. ARM MCInstLowering is now justChris Lattner2010-11-141-5/+3
| | | | | | | | a single function instead of a class. It doesn't need the complexity that X86 does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119070 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify and tidy upChris Lattner2010-11-141-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119066 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify and clean up MC symbol lookup for ARM constant pool values. This fixesJim Grosbach2010-11-101-10/+10
| | | | | | | | double quoting of ObjC symbol names in constant pool entries. rdar://8652107 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118688 91177308-0d34-0410-b5e6-96231b3b80d8
* Update ARMConstantPoolValue to not use a modifier string. Use an explicitJim Grosbach2010-11-101-47/+38
| | | | | | | | | VariantKind marker to indicate the additional information necessary. Update MC to handle the new Kinds. rdar://8647623 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118671 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the ARMConstantPoolValue modifier string to an enumeration. This willJim Grosbach2010-11-091-1/+1
| | | | | | help in MC'izing the references that use them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118633 91177308-0d34-0410-b5e6-96231b3b80d8
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