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* ARM sched model: Add branch instructionsArnold Schwaighofer2013-06-041-27/+35
* ARM sched model: Add preload instructionsArnold Schwaighofer2013-06-041-2/+4
* ARM sched model: Add more ALU and CMP instructionsArnold Schwaighofer2013-06-041-37/+49
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-131-5/+5
* s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa2013-04-301-0/+1
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-261-1/+5
* Fix treatment of ARM unallocated hint instructions.Quentin Colombet2013-04-171-4/+11
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-121-16/+40
* ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.Tim Northover2013-04-101-1/+4
* ARM scheduler model: Add scheduler info to more instructions and resourceArnold Schwaighofer2013-04-051-20/+40
* ARM Scheduler Model: Add resources instructions, map resources in subtargetsArnold Schwaighofer2013-04-011-15/+30
* Revert ARM Scheduler Model: Add resources instructions, map resourcesArnold Schwaighofer2013-03-261-30/+15
* ARM Scheduler Model: Add resources instructions, map resources in subtargetsArnold Schwaighofer2013-03-261-15/+30
* ARM: Convenience aliases for 'srs*' instructions.Jim Grosbach2013-02-231-0/+12
* Move MRI liveouts to ARM return instructions.Jakob Stoklund Olesen2013-02-051-1/+1
* Add a special ARM trap encoding for NaCl.Eli Bendersky2013-01-301-2/+26
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-0/+12
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-4/+6
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-061-13/+5
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-241-6/+6
* Add LLVM support for Swift.Bob Wilson2012-09-291-19/+49
* MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648Evan Cheng2012-09-181-2/+4
* Remove predicated pseudo-instructions.Jakob Stoklund Olesen2012-09-051-42/+0
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-09-041-11/+35
* Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ...Jakob Stoklund Olesen2012-08-281-36/+5
* Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM.Jakob Stoklund Olesen2012-08-271-5/+36
* Explicitly mark LEApcrel pseudos with hasSideEffects.Jakob Stoklund Olesen2012-08-241-0/+3
* Add missing SDNPSideEffect flags.Jakob Stoklund Olesen2012-08-241-6/+9
* Fix undefined behavior (negation of INT_MIN) in ARM backend.Richard Smith2012-08-241-1/+1
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-161-0/+4
* Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen2012-08-161-1/+1
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-151-1/+1
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...Evan Cheng2012-08-151-0/+3
* Add missing Rfalse operand to the predicated pseudo-instructions.Jakob Stoklund Olesen2012-08-151-8/+12
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-121-35/+11
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-08-091-11/+35
* ARM: Tidy up. Remove unused template parameters.Jim Grosbach2012-08-021-20/+16
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-021-0/+3
* ARM: Remove redundant instalias.Jim Grosbach2012-08-011-3/+0
* Clean up formatting.Jim Grosbach2012-08-011-5/+2
* Remove variable_ops from ARM call instructions.Jakob Stoklund Olesen2012-07-131-14/+11
* (sub X, imm) gets canonicalized to (add X, -imm)Evan Cheng2012-06-231-4/+14
* ARM: Add a better diagnostic for some out of range immediates.Jim Grosbach2012-06-221-1/+4
* Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames2012-06-221-1/+2
* Add DAG-combines for aggressive FMA formation.Lang Hames2012-06-191-1/+1
* ARM: Define generic HINT instruction.Jim Grosbach2012-06-181-34/+11
* Re-enable the CMN instruction.Bill Wendling2012-06-111-54/+83
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-021-2/+2
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-4/+4
* ARM: support struct byval in llvmManman Ren2012-06-011-0/+14