aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMInstrThumb.td
Commit message (Expand)AuthorAgeFilesLines
...
* Move Thumb tail call pseudos to Thumb.td file.Jim Grosbach2011-07-081-0/+25
* Use TableGen'erated pseudo lowering for ARM.Jim Grosbach2011-07-081-8/+11
* Pseudo-ize t2MOVCC[ri].Jim Grosbach2011-07-011-26/+1
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-301-38/+4
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-301-11/+12
* Pseudo-ize the Thumb tTPsoft instruction.Jim Grosbach2011-06-301-7/+5
* Pseudo-ize the Thumb tPOP_RET instruction.Jim Grosbach2011-06-301-9/+2
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-291-26/+0
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-271-4/+5
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-211-17/+2
* Clean up a few 80 column violations.Jim Grosbach2011-06-131-4/+5
* Fix for setjmp/longjmp exception handling on ARM. setjmp clobbers CPSR.Andrew Trick2011-06-071-1/+1
* Make the branch encoding for tBcc more obvious that it's a 4-byte opcodeEric Christopher2011-05-271-1/+1
* Mark tBX as an indirect branch rather than a return.Cameron Zwarich2011-05-261-8/+8
* Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions.Cameron Zwarich2011-05-251-10/+4
* Move some code to a more logical place.Cameron Zwarich2011-05-251-8/+8
* Change the order of tBX's operands so that the predicate operands come after theCameron Zwarich2011-05-251-1/+1
* Rename tBX_Rm to tBX.Cameron Zwarich2011-05-251-3/+2
* Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to betterCameron Zwarich2011-05-251-2/+2
* Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan.Owen Anderson2011-05-111-4/+8
* Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-regist...Jakob Stoklund Olesen2011-05-031-8/+2
* Fold ARM coprocessor intrinsics patterns into the instructions defs wheneverBruno Cardoso Lopes2011-05-031-24/+19
* Add a few ARM coprocessor intrinsics. Testcases includedBruno Cardoso Lopes2011-05-031-0/+17
* Let the immediate leaf pattern take transforms and switch the signedEric Christopher2011-04-281-6/+6
* Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) s...Johnny Chen2011-04-221-0/+13
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Follow up on r127913. Fix Thumb revsh isel. rdar://9286766Evan Cheng2011-04-141-1/+9
* Thumb disassembler was erroneously rejecting "blx sp" instruction.Johnny Chen2011-04-111-0/+9
* Change MRC and MRC2 instructions to model the output register properlyBruno Cardoso Lopes2011-03-221-6/+8
* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-141-13/+9
* Add cdp/cdp2 instructions for thumb/thumb2Bruno Cardoso Lopes2011-01-201-0/+25
* Add mcr* and mr*c support to thumb targetsBruno Cardoso Lopes2011-01-201-0/+55
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-1/+1
* Fix a copy-pasto. When the tBR_JTr instruction was converted to using theBill Wendling2010-12-211-1/+1
* Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974Jim Grosbach2010-12-161-3/+4
* Add encodings for Thumb1 Spill and Restore pseudos.Bill Wendling2010-12-161-2/+12
* Thumb1 had two patterns for the same load-from-constant-pool instruction.Jim Grosbach2010-12-151-13/+0
* Whitespace cleanups.Bill Wendling2010-12-151-3/+3
* Add some missing patterns now that tLDRB and tLDRH are split into reg andBill Wendling2010-12-151-2/+12
* Comments and cleaning.Bill Wendling2010-12-141-6/+4
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-15/+18
* Multiclassify the LDR/STR encoding patterns. The only functionality differenceBill Wendling2010-12-141-69/+69
* Use the integer scheduling intrinsic for integer loads and stores.Bill Wendling2010-12-141-6/+6
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-78/+110
* Fix encoding of Thumb1 LDRB and STRB.Owen Anderson2010-12-101-0/+1
* Thumb unconditional branch binary encoding. rdar://8754994Jim Grosbach2010-12-101-2/+10
* Thumb conditional branch binary encodings. rdar://8745367Jim Grosbach2010-12-101-1/+7
* Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of theBill Wendling2010-12-091-3/+3
* Rename the encoder method for t_cbtarget to match.Jim Grosbach2010-12-091-1/+1
* Thumb needs a few different encoding schemes for branch targets. RenameJim Grosbach2010-12-091-3/+3
generated by cgit v1.1 at 2025-02-05 02:56:03 +0000