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path: root/lib/Target/ARM/ARMTargetMachine.cpp
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* rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.Chris Lattner2009-08-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79773 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on if-conversion for thumb2.Evan Cheng2009-08-151-6/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 78892 and 78895, these break generating working executables onDaniel Dunbar2009-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | x86_64-apple-darwin10. --- Reverse-merging r78895 into '.': U test/CodeGen/PowerPC/2008-12-12-EH.ll U lib/Target/DarwinTargetAsmInfo.cpp --- Reverse-merging r78892 into '.': U include/llvm/Target/DarwinTargetAsmInfo.h U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Target/X86/X86TargetAsmInfo.h U lib/Target/ARM/ARMTargetAsmInfo.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/ARMTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.h U lib/Target/PowerPC/PPCTargetMachine.cpp G lib/Target/DarwinTargetAsmInfo.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a minor fixme. When building with SL and later tools, the ".eh" symbolsChris Lattner2009-08-131-1/+1
| | | | | | | don't need to be exported from the .o files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78892 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-10/+16
| | | | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
* pass the TargetTriple down from each target ctor to theChris Lattner2009-08-111-1/+1
| | | | | | | LLVMTargetMachine ctor. It is currently unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78666 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding a blank line back.Evan Cheng2009-08-111-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78654 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch ↵Evan Cheng2009-08-101-5/+1
| | | | | | of thumb2 tests to FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78622 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng2009-08-081-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new pre-allocation pass to assign adjacent registers for Neon instructionsBob Wilson2009-08-051-0/+3
| | | | | | | | | | that have that constraint. This is currently just assigning a fixed set of registers, and it only handles VLDn for n=2,3,4 with DPR registers. I'm going to expand it to handle more operations next; we can make it smarter once everything is working correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78256 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops. I didn't mean to commit this piece yet.Bob Wilson2009-08-051-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78146 91177308-0d34-0410-b5e6-96231b3b80d8
* Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.Bob Wilson2009-08-051-0/+2
| | | | | | | | | | Get rid of yesterday's code to fix the register usage during isel. Select the new DAG nodes to machine instructions. The new pre-alloc pass to choose adjacent registers for these results is not done, so the results of this will generally not assemble yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78136 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.Evan Cheng2009-08-041-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78104 91177308-0d34-0410-b5e6-96231b3b80d8
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-7/+6
| | | | | | | - The C, C++, MSIL, and Mips backends still need the module. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-1/+1
| | | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.Chris Lattner2009-08-021-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77878 91177308-0d34-0410-b5e6-96231b3b80d8
* remove dead code.Chris Lattner2009-07-271-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77233 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new helpers for registering targets.Daniel Dunbar2009-07-251-9/+6
| | | | | | | - Less boilerplate == good. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
* Put Target definitions inside Target specific header, and llvm namespace.Daniel Dunbar2009-07-181-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
* Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLinkDaniel Dunbar2009-07-161-7/+0
| | | | | | | | variables. - Module initialization functions supplanted the need for these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75886 91177308-0d34-0410-b5e6-96231b3b80d8
* Lift addAssemblyEmitter into LLVMTargetMachine.Daniel Dunbar2009-07-151-12/+0
| | | | | | | - No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
* Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.Daniel Dunbar2009-07-151-24/+0
| | | | | | | - No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove old style hacks to register AsmPrinter into TargetMachine.Daniel Dunbar2009-07-151-8/+4
| | | | | | | - No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75843 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply TargetRegistry refactoring commits.Daniel Dunbar2009-07-151-63/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | --- Reverse-merging r75799 into '.': U test/Analysis/PointerTracking U include/llvm/Target/TargetMachineRegistry.h U include/llvm/Target/TargetMachine.h U include/llvm/Target/TargetRegistry.h U include/llvm/Target/TargetSelect.h U tools/lto/LTOCodeGenerator.cpp U tools/lto/LTOModule.cpp U tools/llc/llc.cpp U lib/Target/PowerPC/PPCTargetMachine.h U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp U lib/Target/PowerPC/PPCTargetMachine.cpp U lib/Target/PowerPC/PPC.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/ARMTargetMachine.h U lib/Target/ARM/ARM.h U lib/Target/XCore/XCoreTargetMachine.cpp U lib/Target/XCore/XCoreTargetMachine.h U lib/Target/PIC16/PIC16TargetMachine.cpp U lib/Target/PIC16/PIC16TargetMachine.h U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp U lib/Target/Alpha/AlphaTargetMachine.cpp U lib/Target/Alpha/AlphaTargetMachine.h U lib/Target/X86/X86TargetMachine.h U lib/Target/X86/X86.h U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.h U lib/Target/CppBackend/CPPTargetMachine.h U lib/Target/CppBackend/CPPBackend.cpp U lib/Target/CBackend/CTargetMachine.h U lib/Target/CBackend/CBackend.cpp U lib/Target/TargetMachine.cpp U lib/Target/IA64/IA64TargetMachine.cpp U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp U lib/Target/IA64/IA64TargetMachine.h U lib/Target/IA64/IA64.h U lib/Target/MSIL/MSILWriter.cpp U lib/Target/CellSPU/SPUTargetMachine.h U lib/Target/CellSPU/SPU.h U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp U lib/Target/CellSPU/SPUTargetMachine.cpp U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp U lib/Target/Mips/MipsTargetMachine.cpp U lib/Target/Mips/MipsTargetMachine.h U lib/Target/Mips/Mips.h U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp U lib/Target/Sparc/SparcTargetMachine.cpp U lib/Target/Sparc/SparcTargetMachine.h U lib/ExecutionEngine/JIT/TargetSelect.cpp U lib/Support/TargetRegistry.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to ↵Stuart Hastings2009-07-151-15/+63
| | | | | | | | | repair broken LLVM-GCC build. Will revert 75770 in the llvm-gcc trunk. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace large swaths of copy-n-paste code with obvious helper function...Daniel Dunbar2009-07-151-30/+12
| | | | | | | | | | | | | | | | | | | | | | | | - Which was already present in the module! - I skipped this xform for Alpha, since it runs an extra pass during assembly emission, but not when emitting assembly via the DumpAsm flag. - No functionality change. -- ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c 18 - PM.add(AsmPrinterCtor(ferrs(), *this, true)); 18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 18 - if (AsmPrinterCtor) 18 - if (DumpAsm) { 18 - } ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c 18 + addAssemblyEmitter(PM, OptLevel, true, ferrs()); 18 + if (DumpAsm) -- git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75782 91177308-0d34-0410-b5e6-96231b3b80d8
* Kill off old (TargetMachine level, not Target level) match quality functions.Daniel Dunbar2009-07-151-55/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide TargetMachine implementations with reference to Target they were createdDaniel Dunbar2009-07-151-6/+10
| | | | | | | | | from. - This commit is almost entirely propogating the reference through the TargetMachine subclasses' constructor calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
* Register Target's TargetMachine and AsmPrinter in the new registry.Daniel Dunbar2009-07-151-2/+5
| | | | | | | | - This abuses TargetMachineRegistry's constructor for now, this will get cleaned up in time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
* Have asm printers use formatted_raw_ostream directly to avoid aDavid Greene2009-07-141-8/+8
| | | | | | | dynamic_cast<>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a thumb2 pass to insert IT blocks.Evan Cheng2009-07-101-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75218 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-061-0/+33
| | | | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into ↵David Goodwin2009-07-021-1/+6
| | | | | | Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused AsmPrinter OptLevel argument, and propogate.Daniel Dunbar2009-07-011-5/+5
| | | | | | | | - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
* Split thumb-related stuff into separate classes.Anton Korobeynikov2009-06-261-47/+49
| | | | | | Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide InitializeAllTargets and InitializeNativeTarget functions in theBob Wilson2009-06-231-4/+2
| | | | | | | | | C bindings. Change all the backend "Initialize" functions to have C linkage. Change the "llvm/Config/Targets.def" header to use C-style comments to avoid compile warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable arm pre-allocation load / store multiple optimization pass.Evan Cheng2009-06-191-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
* Latency information for ARM v6. It's rough and not yet hooked up. Right now ↵Evan Cheng2009-06-191-1/+2
| | | | | | we are only using branch latency to determine if-conversion limits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce new headers whose inclusion forces linking andDouglas Gregor2009-06-161-0/+5
| | | | | | | | | | | initialization of all targets (InitializeAllTargets.h) or assembler printers (InitializeAllAsmPrinters.h). This is a step toward the elimination of relinked object files, so that we can build normal archives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a ARM specific pre-allocation pass that re-schedule loads / stores fromEvan Cheng2009-06-131-0/+13
| | | | | | | | | | | | consecutive addresses togther. This makes it easier for the post-allocation pass to form ldm / stm. This is step 1. We are still missing a lot of ldm / stm opportunities because of register allocation are not done in the desired order. More enhancements coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73291 91177308-0d34-0410-b5e6-96231b3b80d8
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-301-0/+36
| | | | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-8/+13
| | | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
* Second attempt:Bill Wendling2009-04-291-12/+16
| | | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-16/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-12/+16
| | | | | | | | | | | | use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-251-4/+4
| | | | | | default to verbose. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM target now also recognize triplets like thumbv6-apple-darwin and set ↵Evan Cheng2009-03-091-2/+5
| | | | | | thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66435 91177308-0d34-0410-b5e6-96231b3b80d8
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-241-3/+3
| | | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
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