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* Change the interface to the type legalization methodDuncan Sands2008-12-012-4/+12
| | | | | | | | | | | | ReplaceNodeResults: rather than returning a node which must have the same number of results as the original node (which means mucking around with MERGE_VALUES, and which is also easy to get wrong since SelectionDAG folding may mean you don't get the node you expect), return the results in a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
* Move target independent td files from lib/Target/ to include/llvm/Target so ↵Evan Cheng2008-11-241-1/+1
| | | | | | they can be distributed along with the header files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SetCCResultContents to BooleanContents. InDuncan Sands2008-11-231-1/+1
| | | | | | | | practice these booleans are mostly produced by SetCC, however the concept is more general. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-182-4/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+7
| | | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59378 91177308-0d34-0410-b5e6-96231b3b80d8
* This shouldn't be necessaryAndrew Lenharth2008-11-111-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59090 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: corrected split of Alpha and Sparc AsmPrinters.Oscar Fuentes2008-11-111-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59050 91177308-0d34-0410-b5e6-96231b3b80d8
* Separate alpha asmprinter. This should unbreak native build.Anton Korobeynikov2008-11-114-1/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59046 91177308-0d34-0410-b5e6-96231b3b80d8
* fix another libgcc blockerAndrew Lenharth2008-11-111-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59026 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ↵Evan Cheng2008-11-081-2/+2
| | | | | | ptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58897 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor various TargetAsmInfo subclasses' TargetMachine members awayDan Gohman2008-11-031-1/+3
| | | | | | | adding a TargetMachine member to the base TargetAsmInfo class instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58624 91177308-0d34-0410-b5e6-96231b3b80d8
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman2008-10-182-0/+8
| | | | | | | | | | | | | | | | | | | | | | | and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim #includes.Dan Gohman2008-10-161-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57649 91177308-0d34-0410-b5e6-96231b3b80d8
* mark some targets as experimental. Andrew, if you think that Alpha isChris Lattner2008-10-161-1/+1
| | | | | | | | basically working, feel free to remove the tag. The other targets have really basic things that break them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57628 91177308-0d34-0410-b5e6-96231b3b80d8
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-162-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename LoadX to LoadExt.Evan Cheng2008-10-141-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-112-8/+5
| | | | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
* get CodeGen/Alpha/mul128.ll to work.Chris Lattner2008-10-091-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57318 91177308-0d34-0410-b5e6-96231b3b80d8
* Note that ADDC and company don't actually expand yet (missing in legalizeAndrew Lenharth2008-10-072-2/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57226 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-4/+1
| | | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-034-16/+15
| | | | | | | isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-1/+1
| | | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+1
| | | | | | disabled when frame address is desired. Also add support for depth > 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
* Add "inreg" field to CallSDNode (doesn't increaseDale Johannesen2008-09-262-5/+5
| | | | | | | | | | | its size). Adjust various lowering functions to pass this info through from CallInst. Use it to implement sseregparm returns on X86. Remove X86_ssecall calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-3/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | | instruction opcodes are now numbered. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56497 91177308-0d34-0410-b5e6-96231b3b80d8
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-11/+0
| | | | | | | | default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-8/+9
| | | | | | | Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-9/+8
| | | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-123-36/+43
| | | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-043-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+11
| | | | | | | | No functional change (and no FE change to generate them). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
* Change getBinaryCodeForInstr prototype. First operand MachineInstr& should ↵Evan Cheng2008-09-021-6/+8
| | | | | | be const. Make corresponding changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55623 91177308-0d34-0410-b5e6-96231b3b80d8
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-282-15/+15
| | | | | | Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-6/+8
| | | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-5/+4
| | | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | | from all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-6/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
* Tablegen generated code already tests the opcode value, so it's notDan Gohman2008-08-201-5/+3
| | | | | | | necessary to use dyn_cast in these predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-142-8/+9
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch Alpha to new section handling stuffAnton Korobeynikov2008-08-071-63/+60
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54457 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim #includes.Dan Gohman2008-08-051-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54350 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SDOperand to SDValue.Dan Gohman2008-07-274-121/+121
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
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