aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/Mips/MipsISelLowering.h
Commit message (Collapse)AuthorAgeFilesLines
* Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka2012-07-111-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower RETURNADDR node in Mips backend.Akira Hatanaka2012-07-111-0/+1
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160031 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
* Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.Akira Hatanaka2012-06-131-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
* Define functions MipsTargetLowering::LowerLOAD and LowerSTORE whichAkira Hatanaka2012-06-021-0/+2
| | | | | | | custom-lower unaligned load and store nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157864 91177308-0d34-0410-b5e6-96231b3b80d8
* Define Mips specific unaligned load/store nodes.Akira Hatanaka2012-06-021-1/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157863 91177308-0d34-0410-b5e6-96231b3b80d8
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-251-7/+1
| | | | | | | | | | to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand 64-bit shifts if target ABI is O32.Akira Hatanaka2012-05-091-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156457 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the 'I' inline asm constraint. Also add testsEric Christopher2012-05-071-0/+9
| | | | | | | | from the previous 2 patches. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156279 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-111-0/+1
| | | | | | | | Invalid operation is signaled if the operand of these instructions is NaN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-2/+2
| | | | | | some superfluous forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower SETCC nodes during legalization. Previously, it was lowered in DAG ↵Akira Hatanaka2012-03-091-0/+1
| | | | | | combine pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152450 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-281-1/+1
| | | | | | direct call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-281-1/+1
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
* remove blanks, and some code formatJia Liu2012-02-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-281-1/+1
| | | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which isAkira Hatanaka2012-02-031-0/+2
| | | | | | | | | | needed to emit a 64-bit gp-relative relocation entry. Make changes necessary for emitting jump tables which have entries with directive .gpdword. This patch does not implement the parts needed for direct object emission or JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename WrapperPIC. It is now used for both pic and static.Akira Hatanaka2011-12-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement 64-bit support for thread local storage handling.Akira Hatanaka2011-12-081-7/+0
| | | | | | | | | | | | - Modify lowering of global TLS address nodes. - Modify isel of ThreadPointer. - Wrap target global TLS address nodes that are operands of loads with WrapperPIC. - Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be substituted with other existing nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the type of shift amount i32 in order to reduce the number of shiftAkira Hatanaka2011-11-071-0/+2
| | | | | | | | instruction definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143989 91177308-0d34-0410-b5e6-96231b3b80d8
* Add variable IsO32 to MipsTargetLowering.Akira Hatanaka2011-10-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143213 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify lowering of GlobalAddress so that correct code is emitted when target isAkira Hatanaka2011-10-111-1/+1
| | | | | | | Mips64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
* Define variable HasMips64 in MipsTargetLowering.Akira Hatanaka2011-09-261-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-061-1/+1
| | | | | | | | | | | | | with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pattern matching for EXT and INS to post-legalization DAGCombine per ↵Akira Hatanaka2011-08-171-2/+0
| | | | | | Bruno's comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137831 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ext and ins.Akira Hatanaka2011-08-171-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
* Define unaligned load and store. Akira Hatanaka2011-08-121-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower memory barriers to sync instructions.Akira Hatanaka2011-07-191-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove getRegClassForInlineAsmConstraint for Mips.Eric Christopher2011-06-291-4/+0
| | | | | | | Part of rdar://9643582 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134084 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-211-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.Eric Christopher2011-06-091-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of theAkira Hatanaka2011-06-081-1/+3
| | | | | | | | | dynamically allocated stack area was not set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132758 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom-lower FRAMEADDR. Patch by Sasa Stankovic.Akira Hatanaka2011-06-021-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132444 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,Bruno Cardoso Lopes2011-05-311-0/+10
| | | | | | | | | | nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions. The intrinsics are implemented by creating pseudo-instructions, which are then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter. Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements the thread local storage. Implemented are GeneralBruno Cardoso Lopes2011-05-311-0/+10
| | | | | | | | Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
* Define a wrapper node for target constant nodes (tglobaladdr, etc.).Akira Hatanaka2011-05-281-1/+3
| | | | | | | Need this to prevent emitting illegal conditional move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132240 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove MipsTargetLowering::LowerFP_TO_SINT. Patterns for fp_to_sint have alreadyAkira Hatanaka2011-05-251-1/+0
| | | | | | | been defined in MipsInstrFPU.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132076 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom-lower FCOPYSIGN nodes.Akira Hatanaka2011-05-251-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the logic for determining function alignment more explicit. No ↵Eli Friedman2011-05-061-3/+0
| | | | | | functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-8/+7
| | | | | | in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-7/+8
| | | | | | change in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
* Add pass that expands pseudo instructions into target instructions after ↵Akira Hatanaka2011-04-151-1/+4
| | | | | | register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka2011-03-311-8/+4
| | | | | | handling of FP comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve div/rem node handling on mips. Patch by Akira HatanakaBruno Cardoso Lopes2011-03-041-1/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127034 91177308-0d34-0410-b5e6-96231b3b80d8
* Lowers block address. Currently asserts when relocation model is not PIC. ↵Bruno Cardoso Lopes2011-03-041-0/+1
| | | | | | Patch by Akira Hatanaka git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127027 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-041-7/+7
| | | | | | Hatanaka, Akira git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127003 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for mips32 madd and msub instructions. Patch by Akira HatanakaBruno Cardoso Lopes2011-01-181-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123760 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove target specific node MipsISD::CMov, which is not used because all ↵Bruno Cardoso Lopes2010-12-071-3/+0
| | | | | | conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121164 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline asm multiple alternative constraints development phase 2 - improved ↵John Thompson2010-10-291-0/+5
| | | | | | basic logic, added initial platform support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-03-29 22:56:57 +0000