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* [mips] Clean up class MipsCCInfo.Akira Hatanaka2013-02-151-22/+26
| | | | | | | No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175310 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Lower EH_RETURN.Akira Hatanaka2013-01-301-0/+3
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173862 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some code a little simpler.Reed Kotler2013-01-281-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173649 91177308-0d34-0410-b5e6-96231b3b80d8
* The next phase of Mips16 hard float implementation.Reed Kotler2013-01-241-0/+7
| | | | | | | | | | | | | | | | | | Allow Mips16 routines to call Mips32 routines that have abi requirements that either arguments or return values are passed in floating point registers. This handles only the pic case. We have not done non pic for Mips16 yet in any form. The libm functions are Mips32, so with this addition we have a complete Mips16 hard float implementation. We still are not able to complete mix Mip16 and Mips32 with hard float. That will be the next phase which will have several steps. For Mips32 to freely call Mips16 some stub functions must be created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173320 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Clean up code in MipsTargetLowering::LowerCall. No functional changeAkira Hatanaka2013-01-221-1/+2
| | | | | | | | intended git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173189 91177308-0d34-0410-b5e6-96231b3b80d8
* This code implements most of mips16 hardfloat as it is done by gcc.Reed Kotler2012-12-151-0/+2
| | | | | | | | | | | | | | | | | | In this case, essentially it is soft float with different library routines. The next step will be to make this fully interoperational with mips32 floating point and that requires creating stubs for functions with signatures that contain floating point types. I have a more sophisticated design for mips16 hardfloat which I hope to implement at a later time that directly does floating point without the need for function calls. The mips16 encoding has no floating point instructions so one needs to switch to mips32 mode to execute floating point instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170259 91177308-0d34-0410-b5e6-96231b3b80d8
* Sorry about the churn. One more change to getOptimalMemOpType() hook. Did IEvan Cheng2012-12-121-1/+2
| | | | | | | | | | | | | mention the inline memcpy / memset expansion code is a mess? This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset. The first indicates whether it is expanding a memset or a memcpy / memmove. The later is whether the memset is a memset of zero. It's totally possible (likely even) that targets may want to do different things for memcpy and memset of zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169959 91177308-0d34-0410-b5e6-96231b3b80d8
* - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.Evan Cheng2012-12-121-1/+1
| | | | | | | | | | Also added more comments to explain why it is generally ok to return true. - Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to be true for loaded source (memcpy) or zero constants (memset). The poor name choice is probably some kind of legacy issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169954 91177308-0d34-0410-b5e6-96231b3b80d8
* Some enhancements for memcpy / memset inline expansion.Evan Cheng2012-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | 1. Teach it to use overlapping unaligned load / store to copy / set the trailing bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies. 2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g. x86 and ARM. 3. When memcpy from a constant string, do *not* replace the load with a constant if it's not possible to materialize an integer immediate with a single instruction (required a new target hook: TLI.isIntImmLegal()). 4. Use unaligned load / stores more aggressively if target hooks indicates they are "fast". 5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8. Also increase the threshold to something reasonable (8 for memset, 4 pairs for memcpy). This significantly improves Dhrystone, up to 50% on ARM iOS devices. rdar://12760078 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169791 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial implementation of MipsTargetLowering::isLegalAddressingMode.Akira Hatanaka2012-11-171-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-071-0/+1
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka2012-10-301-2/+3
| | | | | | | | use the caller's stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definition of function MipsTargetLowering::passArgOnStack which emits nodesAkira Hatanaka2012-10-301-0/+4
| | | | | | | | for passing a function call argument on a stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167041 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Do not tail-call optimize vararg functions or functions with byvalAkira Hatanaka2012-10-271-1/+2
| | | | | | | | | | arguments. This is rather conservative and should be fixed later to be more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::writeVarArgRegs which copies argument registersAkira Hatanaka2012-10-271-0/+6
| | | | | | | | of vararg functions back to the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166844 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::passByValArg.Akira Hatanaka2012-10-271-0/+8
| | | | | | | | | | This method emits nodes for passing byval arguments in registers and stack. This has the same functionality as existing functions PassByValArg64 and WriteByValArg which will be deleted later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166843 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::copyByValRegs.Akira Hatanaka2012-10-271-0/+10
| | | | | | | | | | This method copies byval arguments passed in registers onto the stack and has the same functionality as existing functions CopyMips64ByValRegs and ReadByValArg which will be deleted later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166841 91177308-0d34-0410-b5e6-96231b3b80d8
* Add class MipsCC which provides methods used to analyze formal and callAkira Hatanaka2012-10-261-0/+64
| | | | | | | | arguments and inquire about calling convention information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166840 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add code to do tail call optimization.Akira Hatanaka2012-10-191-0/+5
| | | | | | | | | Currently, it is enabled only if option "enable-mips-tail-calls" is given and all of the callee's arguments are passed in registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166342 91177308-0d34-0410-b5e6-96231b3b80d8
* Add node and enum for mips tail call.Akira Hatanaka2012-10-191-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166318 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsTargetLowering::CanLowerReturn.Akira Hatanaka2012-10-101-0/+6
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165585 91177308-0d34-0410-b5e6-96231b3b80d8
* MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos ↵Akira Hatanaka2012-09-271-0/+2
| | | | | | Field instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
* MIPS DSP: add support for extract-word instructions.Akira Hatanaka2012-09-271-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MIPS DSP register classes. Set actions of DSP vector operations and overrideAkira Hatanaka2012-09-211-0/+10
| | | | | | | TargetLowering's callback functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG node enums for MIPS DSP nodes.Akira Hatanaka2012-09-211-0/+41
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-311-1/+0
| | | | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka2012-07-111-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower RETURNADDR node in Mips backend.Akira Hatanaka2012-07-111-0/+1
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160031 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
* Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.Akira Hatanaka2012-06-131-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
* Define functions MipsTargetLowering::LowerLOAD and LowerSTORE whichAkira Hatanaka2012-06-021-0/+2
| | | | | | | custom-lower unaligned load and store nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157864 91177308-0d34-0410-b5e6-96231b3b80d8
* Define Mips specific unaligned load/store nodes.Akira Hatanaka2012-06-021-1/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157863 91177308-0d34-0410-b5e6-96231b3b80d8
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-251-7/+1
| | | | | | | | | | to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand 64-bit shifts if target ABI is O32.Akira Hatanaka2012-05-091-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156457 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the 'I' inline asm constraint. Also add testsEric Christopher2012-05-071-0/+9
| | | | | | | | from the previous 2 patches. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156279 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-111-0/+1
| | | | | | | | Invalid operation is signaled if the operand of these instructions is NaN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-2/+2
| | | | | | some superfluous forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower SETCC nodes during legalization. Previously, it was lowered in DAG ↵Akira Hatanaka2012-03-091-0/+1
| | | | | | combine pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152450 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-281-1/+1
| | | | | | direct call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-281-1/+1
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
* remove blanks, and some code formatJia Liu2012-02-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-281-1/+1
| | | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which isAkira Hatanaka2012-02-031-0/+2
| | | | | | | | | | needed to emit a 64-bit gp-relative relocation entry. Make changes necessary for emitting jump tables which have entries with directive .gpdword. This patch does not implement the parts needed for direct object emission or JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename WrapperPIC. It is now used for both pic and static.Akira Hatanaka2011-12-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement 64-bit support for thread local storage handling.Akira Hatanaka2011-12-081-7/+0
| | | | | | | | | | | | - Modify lowering of global TLS address nodes. - Modify isel of ThreadPointer. - Wrap target global TLS address nodes that are operands of loads with WrapperPIC. - Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be substituted with other existing nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the type of shift amount i32 in order to reduce the number of shiftAkira Hatanaka2011-11-071-0/+2
| | | | | | | | instruction definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143989 91177308-0d34-0410-b5e6-96231b3b80d8
* Add variable IsO32 to MipsTargetLowering.Akira Hatanaka2011-10-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143213 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify lowering of GlobalAddress so that correct code is emitted when target isAkira Hatanaka2011-10-111-1/+1
| | | | | | | Mips64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
* Define variable HasMips64 in MipsTargetLowering.Akira Hatanaka2011-09-261-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-061-1/+1
| | | | | | | | | | | | | with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
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