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* Add a missed CommonLinkage check.Dale Johannesen2008-05-231-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51503 91177308-0d34-0410-b5e6-96231b3b80d8
* Cosmetics.Dale Johannesen2008-02-151-6/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47168 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove warning about 64-bit code on processorDale Johannesen2008-02-151-4/+0
| | | | | | | | that doesn't support it. Per Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47162 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite tblgen handling of subtarget features soDale Johannesen2008-02-141-0/+1
| | | | | | | | | | | | it follows the order of the enum, not alphabetical. The motivation is to make -mattr=+ssse3,+sse41 select SSE41 as it ought to. Added "ignored" enum values of 0 to PPC and SPU to avoid compiler warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
* Use size_t to store Pos, avoid truncating valueDuncan Sands2008-01-081-1/+1
| | | | | | | | | on 64-bit builds. Analysis and original patch by Török Edwin. Code audit found another place with the same problem, also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45746 91177308-0d34-0410-b5e6-96231b3b80d8
* leopard and above support alignment for common symbols.Chris Lattner2008-01-021-7/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45493 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
* Here is the bulk of the sanitizing.Gabor Greif2007-07-051-1/+1
| | | | | | | Almost all occurrences of "bytecode" in the sources have been eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoidReid Spencer2007-01-301-1/+1
| | | | | | | confusion with external linkage types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of yet another enum indicating the "assembly language flavor",Bill Wendling2007-01-161-0/+3
| | | | | | | just use the one that's in the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33255 91177308-0d34-0410-b5e6-96231b3b80d8
* Another step forward in PPC64 JIT support: we now no-longer need stubsChris Lattner2006-12-111-4/+34
| | | | | | | | | | | emitted for external globals in PPC64-JIT-PIC mode (which is good because we didn't handle them before!). This also fixes a bug handling the picbase delta, which we would get wrong in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32451 91177308-0d34-0410-b5e6-96231b3b80d8
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove what little AIX support we have. It has never been tested and isn'tChris Lattner2006-07-151-6/+1
| | | | | | | complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
* Force 64-bit register availability in 64-bit mode. For real.Chris Lattner2006-06-161-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -darwin and -aix llc options, inferring darwinism and aixism fromChris Lattner2006-06-161-15/+3
| | | | | | | the target triple & subtarget info. woo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
* Document the subtarget features better, make sure that 64-bit mode, 64-bitChris Lattner2006-06-161-0/+21
| | | | | | | | | | | support, and 64-bit register use are all consistent with each other. Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this to configure TargetData differently. This not makes ppc64 blow up on lots of stuff :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename some subtarget features. A CPU now can *have* 64-bit instructions,Chris Lattner2006-06-161-2/+2
| | | | | | | can in 32-bit mode we can choose to optionally *use* 64-bit registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
* First baby step towards ppc64 support. This adds a new -march=ppc64 backendChris Lattner2006-06-161-1/+1
| | | | | | | that is currently just like ppc32 :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
* Compile this:Chris Lattner2006-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | void foo(float a, int *b) { *b = a; } to this: _foo: fctiwz f0, f1 stfiwx f0, 0, r4 blr instead of this: _foo: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) stw r2, 0(r4) blr This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the right thing for GCC bugzilla 26505. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26447 91177308-0d34-0410-b5e6-96231b3b80d8
* - Added option -relocation-model to set relocation model. Valid values ↵Evan Cheng2006-02-221-7/+1
| | | | | | | | | | | include static, pic, dynamic-no-pic, and default. PPC and x86 default is dynamic-no-pic for Darwin, pic for others. - Removed options -enable-pic and -ppc-static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
* add a note about how we should implement this FIXME from the legalizer:Chris Lattner2006-01-281-1/+1
| | | | | | | | | // FIXME: revisit this when we have some kind of mechanism by which targets // can decided legality of vector constants, of which there may be very // many. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25733 91177308-0d34-0410-b5e6-96231b3b80d8
* add an option to generate completely non-pic code, corresponding to whatChris Lattner2005-11-171-0/+6
| | | | | | | | | | | | | | gcc -static produces on PPC. This is used for building kexts and other things. With this, materializing the address of a global looks like: lis r2, ha16(L_H$non_lazy_ptr) la r3, lo16(L_H$non_lazy_ptr)(r2) we're still emitting stubs for functions, which is wrong. That is next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow itineraries to be passed through the Target Machine.Jim Laskey2005-11-011-0/+1
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* Give full control of subtarget features over to table generated code.Jim Laskey2005-10-261-9/+12
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* Preparation of supporting scheduling info. Need to find info based on selectedJim Laskey2005-10-251-3/+4
| | | | | | | CPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23974 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify this, matching changes in the tblgen emitterChris Lattner2005-10-231-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8
* Plugin new subtarget backend into the build.Jim Laskey2005-10-211-58/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
* Do the right thing and enable 64 bit regs under the control of a subtargetNate Begeman2005-10-181-0/+3
| | | | | | | | option. Currently the only way to enable this is to specify the 64bitregs mattr flag. It is never enabled by default on any config yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename PowerPC*.h to PPC*.hChris Lattner2005-10-141-2/+2
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* On non-apple systems, when using -march=ppc32, do not print:Chris Lattner2005-09-071-1/+1
| | | | | | | | | '' is not a recognized processor for this target (ignoring processor) Default to "generic" instead of "" for the default CPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23257 91177308-0d34-0410-b5e6-96231b3b80d8
* Add accessor for 64bit flag, so that we can tell when it is safe toNate Begeman2005-09-061-0/+1
| | | | | | | generate the fun in-register fp<->long instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244 91177308-0d34-0410-b5e6-96231b3b80d8
* Add help support for -mcpu and -mattr.Jim Laskey2005-09-021-21/+27
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* Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.Chris Lattner2005-09-021-7/+4
| | | | | | | Remove the -enable-gpopt option which is subsumed by feature flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23218 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-011-10/+82
| | | | | | | | | 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
* Consolidate the GPOpt stuff to all use the Subtarget, instead of stillChris Lattner2005-08-051-10/+27
| | | | | | | | | depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable gp optimizations by default when available, even when a target tripleChris Lattner2005-08-051-0/+3
| | | | | | | | is available, since the target triple doesn't specify whether to use gpopts or not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22685 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Subtarget support to PowerPC. Next up, using it.Nate Begeman2005-08-041-0/+54
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
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