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* Add the rest of the multiply instructions.Brian Gaeke2004-12-101-2/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18757 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the rest of the logical instructions.Brian Gaeke2004-11-231-6/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18148 91177308-0d34-0410-b5e6-96231b3b80d8
* Add all the rest of the ADD and SUB variants, some of which are important forBrian Gaeke2004-11-211-2/+13
| | | | | | | 64-bit support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18087 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct the implicit-defs information for indirect and direct calls.Brian Gaeke2004-11-161-4/+10
| | | | | | | | You can't have implicit defs that overlap explicit defs, or implicit defs that alias one another. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17894 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand Defs to encompass all the possibly-call-clobbered regs.Brian Gaeke2004-11-151-1/+2
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* The field is called `imm22', not simply `imm'Misha Brukman2004-10-141-1/+1
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* Synthetic instructions RET and RETL need to have all 3 parameters specifiedMisha Brukman2004-10-141-4/+6
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* Add FSTOI, FDTOI (fp to integer cast) instructions.Brian Gaeke2004-10-141-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16996 91177308-0d34-0410-b5e6-96231b3b80d8
* Model calls as *both* using *and* killing O0..O5, because callees use theBrian Gaeke2004-10-101-1/+2
| | | | | | | | argument values passed in (so they're not dead until *after* the call), and callees are free to modify those registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16882 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the instructions that have delay slots with the hasDelaySlot flag.Brian Gaeke2004-09-301-9/+17
| | | | | | | Add some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16611 91177308-0d34-0410-b5e6-96231b3b80d8
* Tell the target description that calls clobber registers O0...O5.Brian Gaeke2004-09-291-10/+9
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* FITOD is spelled "fitod", not "fitos". Ouch.Brian Gaeke2004-09-291-1/+1
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* Add new FpMOVD pseudo-instruction, used to move doubles around.Brian Gaeke2004-09-291-0/+1
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* Combine the F2 and F3 instruction classes into one file for simplicityMisha Brukman2004-09-221-2/+1
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* Remove ClassPrefix variable as it's no longer used.Misha Brukman2004-08-091-1/+0
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* The (future) SparcV8 JIT would do well to have a class prefix.Misha Brukman2004-08-091-0/+1
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* I'm pretty sure that ba is branch always, which is a barrier. Brg shouldChris Lattner2004-07-311-1/+3
| | | | | | | check this :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15357 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a class for pseudo-instructions. Use it.Brian Gaeke2004-07-161-8/+7
| | | | | | | Add IMPLICIT_USE and IMPLICIT_DEF, a la X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14884 91177308-0d34-0410-b5e6-96231b3b80d8
* Add floating-point branches and compares. Compares don't completeBrian Gaeke2004-07-081-0/+32
| | | | | | | | until the next cycle, and there's no interlock, so they effectively have a delay slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14686 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}.Brian Gaeke2004-06-271-0/+16
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* Add FSTOD and FDTOS conversion instructions.Brian Gaeke2004-06-241-0/+5
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* Rename the load and store opcodes. The non-fp ones only have oneBrian Gaeke2004-06-241-13/+26
| | | | | | | | variant worth worrying about; the fp ones have two. Add fp stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14361 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix jmpl.Brian Gaeke2004-06-181-3/+7
| | | | | | | Add some FP moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14225 91177308-0d34-0410-b5e6-96231b3b80d8
* Add load instructions for floating-point registers.Brian Gaeke2004-06-181-0/+5
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* Set the isBranch and isTerminator flags on branch instructions correctly.Brian Gaeke2004-06-171-12/+19
| | | | | | | Add a FIXME about the (currently unused) JMPL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14210 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a bunch more branchesBrian Gaeke2004-05-081-4/+12
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* Add ADD with immediateBrian Gaeke2004-05-081-0/+1
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* Add forms of CMP, SUBCC, and a few branches, and some comments.Brian Gaeke2004-05-081-0/+13
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* andd subcc instructions which is used to create the 'cmp' pseudo instructionChris Lattner2004-04-071-1/+3
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* Fix encoding of existing shift instructions, add rr shiftsChris Lattner2004-04-071-3/+6
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* Add a bunch more instructionsChris Lattner2004-04-071-6/+14
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* Add UDIV, SDIV, and a few variants of WR.Brian Gaeke2004-04-071-0/+8
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* Add load, store, and NOP instructions.Brian Gaeke2004-04-021-2/+21
| | | | | | | Fix up comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12631 91177308-0d34-0410-b5e6-96231b3b80d8
* Add UMULrr and SMULrr instructions.Brian Gaeke2004-03-161-0/+4
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* Sort stanzas into Sparc V8 book page number order.Brian Gaeke2004-03-061-17/+23
| | | | | | | Add RET, RETL. Rename SAVE, RESTORE & JMPL for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12185 91177308-0d34-0410-b5e6-96231b3b80d8
* Subtract instructions; minor cleanupsBrian Gaeke2004-03-041-1/+4
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* Simple copyConstantToReg support, SETHIi and ORriBrian Gaeke2004-03-041-0/+4
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* Support add - note, still missing important copyConstantToRegister stuffBrian Gaeke2004-03-031-1/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
* Tab completion is our friend.Chris Lattner2004-02-281-0/+68
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
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