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* Move getAnalysisUsage method from header to .cpp file. Add a normal fileChris Lattner2003-09-232-21/+22
| | | | | | | header comment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8679 91177308-0d34-0410-b5e6-96231b3b80d8
* Use C++ math header instead of C version.Brian Gaeke2003-09-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8648 91177308-0d34-0410-b5e6-96231b3b80d8
* Erase now-unused prototypes.Brian Gaeke2003-09-211-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8647 91177308-0d34-0410-b5e6-96231b3b80d8
* Rearrange #includes ... since there are fewer now I guess it's a win.Brian Gaeke2003-09-211-2/+2
| | | | | | | | (I also zapped printMachineCode() and printLabel() at the previous checkin, but forgot to mention it.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8646 91177308-0d34-0410-b5e6-96231b3b80d8
* Standardize the names of include guards.Brian Gaeke2003-09-215-11/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8645 91177308-0d34-0410-b5e6-96231b3b80d8
* Standardize the names of include guards.Brian Gaeke2003-09-211-4/+2
| | | | | | | Remove more excess whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8644 91177308-0d34-0410-b5e6-96231b3b80d8
* Standardize the names of include guards.Brian Gaeke2003-09-211-6/+5
| | | | | | | Fix typos in file header comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8643 91177308-0d34-0410-b5e6-96231b3b80d8
* I tried to standardize the formatting and tidy up the huge amount ofBrian Gaeke2003-09-212-204/+33
| | | | | | | excess whitespace a little. Also improved some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8642 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert PhyRegAlloc into a proper pass.Brian Gaeke2003-09-212-132/+98
| | | | | | | | | | | | | | | | | | | | | | | PhyRegAlloc.cpp: Don't include TargetMachine.h or TargetRegInfo.h, because these are provided by PhyRegAlloc.h. Merge class RegisterAllocator into class PhyRegAlloc. Simplify & move ctor, dtor to PhyRegAlloc.h. Make some of PhyRegAlloc's reference members into pointer members, so they can be more easily messed with. MarkAllocatedRegs() becomes a member method, with fewer args. PhyRegAlloc.h: Include Pass.h, TargetMachine.h and TargetRegInfo.h. Don't declare TargetRegInfo forward. Give AddedInstrns the obvious clear() method. Make some of PhyRegAlloc's reference members into pointer members, so they can be more easily messed with. Add prototype for markAllocatedRegs(). Remove unused inline void constructLiveRanges(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8641 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in comment. Take out some random whitespace.Brian Gaeke2003-09-161-4/+1
| | | | | | | (Partial merge from my working file) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8564 91177308-0d34-0410-b5e6-96231b3b80d8
* Edit comment for accuracyBrian Gaeke2003-09-161-3/+3
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* Fix typos in comments.Brian Gaeke2003-09-151-2/+2
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* Fixed spelling and grammar.Misha Brukman2003-09-112-18/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8489 91177308-0d34-0410-b5e6-96231b3b80d8
* LiveRange.h is now in lib/CodeGen/RegAllocChris Lattner2003-09-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8299 91177308-0d34-0410-b5e6-96231b3b80d8
* LiveRangeInfo got moved into the lib/CodeGen/RegAlloc directoryChris Lattner2003-09-012-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8297 91177308-0d34-0410-b5e6-96231b3b80d8
* PhyRegAlloc.h got moved to lib/CodeGen/RegAllocChris Lattner2003-09-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8296 91177308-0d34-0410-b5e6-96231b3b80d8
* Move IGNode from public include directory to here. Minor cleanups like ↵Chris Lattner2003-09-015-117/+102
| | | | | | adding std:: namespace qualifiers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8295 91177308-0d34-0410-b5e6-96231b3b80d8
* The word `dependent' has no `a'.Misha Brukman2003-08-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8030 91177308-0d34-0410-b5e6-96231b3b80d8
* Factory methods for function passes now return type FunctionPass *.Brian Gaeke2003-08-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7839 91177308-0d34-0410-b5e6-96231b3b80d8
* For instructions in a delay slot of another instruction,Vikram S. Adve2003-08-121-12/+16
| | | | | | | | | we no longer need to find the live-before set of the delayed branch since that set is now included the live-before/after set of the instructions in each delay slot. Just assert that instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7796 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a new local data structure instead of the MachineInstr::regsUsed setChris Lattner2003-08-051-8/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7621 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a mapChris Lattner2003-08-051-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7620 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor cleanupsChris Lattner2003-08-051-23/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7619 91177308-0d34-0410-b5e6-96231b3b80d8
* Physical registers no longer live in the regsUsed set for each machine instrChris Lattner2003-08-051-18/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7618 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Bug fix: Don't use branch operand reg. as temp. reg. whenVikram S. Adve2003-07-291-81/+326
| | | | | | | | | | | | spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). 2. Bug fix: Delete the delay slot instr, not the branch instr, when moving delay slot instr. out!!!! 3. Move code to insert caller-saves moved here from SparcRegInfo: it is now machine-independent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7389 91177308-0d34-0410-b5e6-96231b3b80d8
* Add const version of getLiveRangeForValue().Vikram S. Adve2003-07-291-4/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7386 91177308-0d34-0410-b5e6-96231b3b80d8
* Code to insert caller-saves moved here from SparcRegInfo: it is nowVikram S. Adve2003-07-291-9/+22
| | | | | | | | | | machine-independent. Fix problem with using branch operand reg. as temp. reg. when spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7385 91177308-0d34-0410-b5e6-96231b3b80d8
* Making this code const-correct would be a pain, so I'll hack it.Chris Lattner2003-07-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7350 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extraneous #includesChris Lattner2003-07-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7341 91177308-0d34-0410-b5e6-96231b3b80d8
* (1) Change the way unused regs. are marked and found to consider regTypeVikram S. Adve2003-07-254-116/+134
| | | | | | | | | | | | info (since multiple reg types may share the same reg class). (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7329 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused field. Change the way unused regs. are marked andVikram S. Adve2003-07-251-10/+11
| | | | | | | | found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8
* isMarkedForSpill() should be const.Vikram S. Adve2003-07-101-1/+1
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* Print out all neighbors in interference graph, not just higher-numbered ones.Vikram S. Adve2003-07-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7153 91177308-0d34-0410-b5e6-96231b3b80d8
* Several fixes to handling of int CC register:Vikram S. Adve2003-07-101-8/+10
| | | | | | | | | | | | | | | | | | | | | | (1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7152 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor beautification: fold a couple of lines of code.Vikram S. Adve2003-07-021-3/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7054 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a ton of extraneous #includesChris Lattner2003-06-222-5/+1
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* Included assert.h so that the code compiles under newer versions of GCC.John Criswell2003-06-112-0/+3
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* Minor changes.Vikram S. Adve2003-05-311-0/+5
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* Extensive changes to the way code generation occurs for functionVikram S. Adve2003-05-312-157/+261
| | | | | | | | | | | | | | | call arguments and return values: Now all copy operations before and after a call are generated during selection instead of during register allocation. The values are copied to virtual registers (or to the stack), but in the former case these operands are marked with the correct physical registers according to the calling convention. Although this complicates scheduling and does not work well with live range analysis, it simplifies the machine-dependent part of register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-272-16/+15
| | | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust to new interfacesChris Lattner2003-01-152-6/+8
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* Move headers aroundChris Lattner2003-01-152-2/+2
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* Header is moved into local directoryChris Lattner2003-01-151-3/+2
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* Add new methodChris Lattner2003-01-151-0/+1
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* #include RegClass.h explicitlyChris Lattner2003-01-154-4/+5
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* Remvoe dependency on RegClass.hChris Lattner2003-01-151-3/+4
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* Use buildmi not MI ctor directlyChris Lattner2003-01-151-3/+2
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* Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> ↵Chris Lattner2003-01-141-1/+1
| | | | | | llvm/CodeGen/FunctionLiveVarInfo.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5284 91177308-0d34-0410-b5e6-96231b3b80d8
* Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.hChris Lattner2003-01-142-2/+2
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* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-142-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
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