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* Remove a ton of extraneous #includesChris Lattner2003-06-224-8/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6842 91177308-0d34-0410-b5e6-96231b3b80d8
* Some preprocessors doen't support // comments and get confusedChris Lattner2003-06-201-1/+1
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* RDCCR defines arg. #1, not arg. #2.Vikram S. Adve2003-06-201-1/+1
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* lib/Target/Sparc/Sparc.cpp:Brian Gaeke2003-06-181-1/+22
| | | | | | | | | | | | | | | | | | | | | | Move LowerAllocations, PrintFunction, and SymbolStripping passes, and the corresponding -disable-strip and -d options, over here to the SPARC target-specific bits of llc. Rename -d to -dump-asm. tools/llc/Makefile: Reindent. Add x86 library so that llc compiles again. tools/llc/llc.cpp: Remove support for running arbitrary optimization passes. Use opt instead. Remove LowerAllocations, PrintFunction, and SymbolStripping passes, as noted above. Allow user to select a backend (x86 or SPARC); default to guessing from the endianness/pointer size of the input bytecode file. Fix typos. Delete empty .s file and exit with error status if target does not support static compilation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6776 91177308-0d34-0410-b5e6-96231b3b80d8
* These instructions really take three operands. This fixes some assertionsChris Lattner2003-06-181-2/+2
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* Actually, change it to use explicit new/delete, which is more likely to beChris Lattner2003-06-161-2/+3
| | | | | | | optimized INTO an alloca git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6727 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove two using declsChris Lattner2003-06-161-18/+14
| | | | | | | Remove usage of alloca git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6725 91177308-0d34-0410-b5e6-96231b3b80d8
* Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",Brian Gaeke2003-06-161-1/+1
| | | | | | | | so that we can easily change its use to be conditional on the result of an autoconf test later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6723 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename FInfo.cpp to FunctionInfo.cpp, eliminate FInfo.hChris Lattner2003-06-161-2/+0
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* move contents of include/llvm/Reoptimizer/Mapping/FInfo.h into here, it is ↵Chris Lattner2003-06-161-0/+2
| | | | | | sparc internal git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6711 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix invalid number of arguments problemChris Lattner2003-06-161-2/+2
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* Included assert.h so that the code compiles under newer versions of GCC.John Criswell2003-06-114-0/+7
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* Updated for the new projects Makefile.John Criswell2003-06-111-4/+4
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* add some commentsGuochun Shi2003-06-102-54/+114
| | | | | | | add a function ModuloScheduling::dumpFinalSchedule() to print out final schedule git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6677 91177308-0d34-0410-b5e6-96231b3b80d8
* add an brief instruction what this pass isGuochun Shi2003-06-101-1/+1
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* a simple introduction to this passGuochun Shi2003-06-101-0/+33
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* cleaned codeGuochun Shi2003-06-103-127/+321
| | | | | | | add some comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6674 91177308-0d34-0410-b5e6-96231b3b80d8
* delete useless functionsGuochun Shi2003-06-084-216/+190
| | | | | | | add comment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6673 91177308-0d34-0410-b5e6-96231b3b80d8
* change DEBUG to DEBUG_PRINTGuochun Shi2003-06-083-102/+106
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* Do not hastily change the Opcode from 'r' to 'i' type if we're not actuallyMisha Brukman2003-06-071-7/+6
| | | | | | | | | SETTING the operand to be an immediate or have verified that one of the operands is really a SignExtended or Unextended immediate value already, which warrants an 'i' opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
* Print address out as hex.Misha Brukman2003-06-061-1/+1
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* Added 'r' and 'i' versions to WRCCR.Misha Brukman2003-06-061-1/+2
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* * Changed Bcc instructions to behave like BPcc instructionsMisha Brukman2003-06-067-38/+64
| | | | | | | | | | * BPA and BPN do not take a %cc register as a parameter * SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions * Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit * Added WRCCR{r,i} opcodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
* * Removed PreSelection pass because that is now done in the JITMisha Brukman2003-06-061-22/+10
| | | | | | | | * Removed instruction scheduling as it is too slow to run in a JIT environment * Removed other passes because they aren't necessary and can slow JIT down git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6652 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bunch of test cases in test/Regression/Jello which could not get theMisha Brukman2003-06-061-2/+13
| | | | | | | address of a floating-point (allocated via ConstantPool) correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8
* * If a global is not a function, just ask the MachineCodeEmitter for the addrMisha Brukman2003-06-061-3/+3
| | | | | | | * Do not block a print statement with a DEBUG() guard if we're going to abort() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6645 91177308-0d34-0410-b5e6-96231b3b80d8
* The SUB*i instructions belong to a different class than their SUB*r brethren.Misha Brukman2003-06-061-4/+4
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* Put all debug print statements under the DEBUG() guard to make output clean soMisha Brukman2003-06-061-35/+36
| | | | | | | that tests can automatically diff the output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6642 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed confusion between register classes and register types.Misha Brukman2003-06-051-2/+4
| | | | | | | Now %fcc registers are recognized correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6640 91177308-0d34-0410-b5e6-96231b3b80d8
* Added missing directive to store the instruction name.Misha Brukman2003-06-051-0/+1
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* Moved predict and annul fields to the end of each individual instructionMisha Brukman2003-06-051-12/+15
| | | | | | | class, because they are currently unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not preset the cc register, the instructions actually use it.Misha Brukman2003-06-051-20/+17
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* Minor tuning -- avoid a non-inlinable function call on every operand.Vikram S. Adve2003-06-051-70/+72
| | | | | | | Also, reorder a couple of functions for inlining. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6635 91177308-0d34-0410-b5e6-96231b3b80d8
* Added lazy function resolution to the JIT.Misha Brukman2003-06-052-31/+223
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* * The textual output of (non-)predicted FP branches is the same.Misha Brukman2003-06-051-24/+50
| | | | | | | | * Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead. * Fixed opf in FCMPxy instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6632 91177308-0d34-0410-b5e6-96231b3b80d8
* All store instructions really want 'rd' in the first field.Misha Brukman2003-06-051-13/+20
| | | | | | | | | Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and expect %fsr as the parameter in assembly. They are disabled (since not used) until an encoding, both for code generation and output, is chosen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6619 91177308-0d34-0410-b5e6-96231b3b80d8
* Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.Misha Brukman2003-06-051-3/+2
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* lib/CodeGen/Mapping/MappingInfo.cpp:Brian Gaeke2003-06-042-109/+117
| | | | | | | | | | | | | | | | | | | | | Update file comment to contain a bunch of the overview mapping-info documentation previously buried within the file. Remove some unnecessary include/using stmts. Rename pass to MappingInfoCollector. Rewrite a lot of it so it doesn't use global instance variables and so it outputs into MappingInfo objects and then dumps those out, instead of going straight to an assembly file. Change name of factory to getMappingInfoCollector. Fold prologue & epilogue writers into MappingInfo methods. lib/Target/Sparc/FInfo.cpp: Correct file comment to reflect above change lib/Target/Sparc/Sparc.cpp: Change name of factory to getMappingInfoCollector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6617 91177308-0d34-0410-b5e6-96231b3b80d8
* Add file comment. Include <vector> and <string>. Update include guardsBrian Gaeke2003-06-041-5/+32
| | | | | | | | to reflect file's current location. Add definition of class MappingInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6616 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert brians patch to get mapping info working againChris Lattner2003-06-041-9/+4
| | | | | | | sorry dude git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6615 91177308-0d34-0410-b5e6-96231b3b80d8
* Had to comment out a line in outByte() to get it to compile because Out and ↵Tanya Lattner2003-06-041-1/+1
| | | | | | | | | tmp were undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6614 91177308-0d34-0410-b5e6-96231b3b80d8
* * Instead of re-inventing the MachineConstantPool emitter that's already givenMisha Brukman2003-06-042-111/+146
| | | | | | | | | | | | | | | | | | | | | in Emitter.cpp, just convert the Sparc version of the constant pool into what's already supported and inter-operate. * Implemented a first pass at lazy function resolution in the JITResolver. That required adding a SparcV9CodeEmitter pointer to simplify generating bit-patterns of the instructions. * SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and lives for the entire duration of the JIT (via PassManager which lives in VM). * Changed all return values in the JITResolver to uint64_t because of the 64-bit Sparc architecture. * Added a new version of getting the value of a GlobalValue in the SparcV9CodeEmitter, which now works for already-generated functions (JITted or library functions). * Removed little-used and unused functions, cleaning up the internal view of the SparcV9CodeEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6612 91177308-0d34-0410-b5e6-96231b3b80d8
* Make writeNumber() void. Get ready to decouple it from .byte directive output.Brian Gaeke2003-06-041-4/+9
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* I have finally seen the light. The code to change the opcode must live higher inMisha Brukman2003-06-041-4/+13
| | | | | | | | | | | | the loop, and in both cases. In the first case, it is a VReg that is a constant so it may be actually converted to a constant. In the second case, it is already a constant, but then if it doesn't change its type (e.g. to become a register and have the value loaded from memory if it is too large to live in its instruction field), we must change the opcode BEFORE the 'continue', otherwise we miss the opportunity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8
* Added the 4.7 instruction class and all the FMOVcc instructions in them.Misha Brukman2003-06-042-37/+130
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* Comment out opcodes currently unused in the Sparc backend.Misha Brukman2003-06-041-0/+3
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* Added instruction format class 3.15 and floating-point compare instructions.Misha Brukman2003-06-042-11/+22
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* Avoid generating a getelementptr instruction of a functionChris Lattner2003-06-041-1/+1
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* Make the write*map methods more self-contained. Document some more.Brian Gaeke2003-06-031-42/+57
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* I documented this file, in an attempt to understand it, with a view towardBrian Gaeke2003-06-031-56/+73
| | | | | | | | | | | | rewriting it. I also vacuumed out all the commented-out code and inaccurate comments, etc. (We need to put the mapping information in a data structure so that we can pass it out to the JIT, instead of automagically converting it to .byte directives.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6574 91177308-0d34-0410-b5e6-96231b3b80d8
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