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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-234-107/+296
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-026-102/+148
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-1/+2
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-298-470/+371
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-248-288/+469
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* am b7485134: am 449fc261: Merge "llvm: convert makefiles to support multilib ↵Colin Cross2014-02-181-2/+0
|\ | | | | | | | | | | | | build" * commit 'b7485134a2cbecc47904988b4cfde24019ac4fa1': llvm: convert makefiles to support multilib build
| * llvm: convert makefiles to support multilib buildColin Cross2014-02-061-2/+0
| | | | | | | | | | | | | | | | Convert makefiles to allow for building two architectures at the same time. This will also cause make checkbuild to build the target libraries for all supported architectures. Change-Id: Ia5e6fe5b1186a67753faafd3532ed4cb280a8b10
* | Merge remote-tracking branch 'upstream/release_34' into merge-20140211Stephen Hines2014-02-114-128/+248
|\ \ | |/ |/| | | | | | | | | | | Conflicts: lib/Linker/LinkModules.cpp lib/Support/Unix/Signals.inc Change-Id: Ia54f291fa5dc828052d2412736e8495c1282aa64
| * X86 Disassembler: remove unused bool typedef-nameDavid Majnemer2013-11-051-2/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194062 91177308-0d34-0410-b5e6-96231b3b80d8
| * AVX-512: added VPCONFLICT instruction and intrinsics,Elena Demikhovsky2013-11-031-1/+49
| | | | | | | | | | | | | | added EVEX_KZ to tablegen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
| * Replace C++ style comment with a C style comment to satisfy some of the ↵Craig Topper2013-10-031-1/+1
| | | | | | | | | | | | build bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191880 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove comma from the end of an enum.Craig Topper2013-10-031-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191877 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-033-39/+174
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191874 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove 0 as a valid encoding for the m-mmmm field.Craig Topper2013-10-011-2/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191732 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove unneeded fields from disassembler internal instruction format.Craig Topper2013-10-012-20/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191731 91177308-0d34-0410-b5e6-96231b3b80d8
| * Various x86 disassembler fixes.Craig Topper2013-09-302-40/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Add VEX_LIG to scalar FMA4 instructions. Use VEX_LIG in some of the inheriting checks in disassembler table generator. Make use of VEX_L_W, VEX_L_W_XS, VEX_L_W_XD contexts. Don't let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from their non-L forms unless VEX_LIG is set. Let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from all of their non-L or non-W cases. Increase ranking on VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE so they get chosen over non-L/non-W forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191649 91177308-0d34-0410-b5e6-96231b3b80d8
| * Build fixRichard Mitton2013-08-301-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189699 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fixed a bug where diassembling an instruction that had a prefix would cause ↵Richard Mitton2013-08-301-7/+9
| | | | | | | | | | | | LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189698 91177308-0d34-0410-b5e6-96231b3b80d8
| * First round of fixes for the x86 fixes for the x86 move accumulator from/to ↵Craig Topper2013-08-251-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory offset instructions. -Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted. -x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size. -Intel syntax printing prints the ptr size and places brackets around the address immediate. Known remaining issues with these instructions: -Segment override prefix is not supported. PR16962 and PR16961. -Immediate size should be changed by address size prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189201 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove trailing whitespace.Craig Topper2013-08-241-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189178 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge commit '10251753b6897adcd22cc981c0cc42f348c109de' into merge-20130807Stephen Hines2013-08-074-4/+213
|\ \ | |/ | | | | | | | | | | | | Conflicts: lib/Archive/ArchiveReader.cpp lib/Support/Unix/PathV2.inc Change-Id: I29d8c1e321a4a380b6013f00bac6a8e4b593cc4e
| * Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-284-4/+181
| | | | | | | | | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
| * Update the X86 disassembler to use xacquire and xrelease when appropriate.Kevin Enderby2013-06-203-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a bit tricky as the xacquire and xrelease hints use the same bytes, 0xf2 and 0xf3, as the repne and rep prefixes. Fortunately llvm has different llvm MCInst Opcode enums for rep/xrelease and repne/xacquire. So to make this work a boolean was added the InternalInstruction struct as part of the Prefix state which is set with the added logic in readPrefixes() when decoding an instruction to determine if these prefix bytes are to be disassembled as xacquire or xrelease. Then we let the matcher pick the normal prefix instructionID and we change the Opcode after that when it is set into the MCInst being created. rdar://11019859 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184490 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge commit '100fbdd06be7590b23c4707a98cd605bdb519498' into merge_20130612Stephen Hines2013-06-121-97/+3
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| * Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-241-97/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a basic first step towards symbolization of disassembled instructions. This used to be done using externally provided (C API) callbacks. This patch introduces: - the MCSymbolizer class, that mimics the same functions that were used in the X86 and ARM disassemblers to symbolize immediate operands and to annotate loads based off PC (for things like c string literals). - the MCExternalSymbolizer class, which implements the old C API. - the MCRelocationInfo class, which provides a way for targets to translate relocations (either object::RelocationRef, or disassembler C API VariantKinds) to MCExprs. - the MCObjectSymbolizer class, which does symbolization using what it finds in an object::ObjectFile. This makes simple symbolization (with no fancy relocation stuff) work for all object formats! - x86-64 Mach-O and ELF MCRelocationInfos. - A basic ARM Mach-O MCRelocationInfo, that provides just enough to support the C API VariantKinds. Most of what works in otool (the only user of the old symbolization API that I know of) for x86-64 symbolic disassembly (-tvV) works, namely: - symbol references: call _foo; jmp 15 <_foo+50> - relocations: call _foo-_bar; call _foo-4 - __cf?string: leaq 193(%rip), %rax ## literal pool for "hello" Stub support is the main missing part (because libObject doesn't know, among other things, about mach-o indirect symbols). As for the MCSymbolizer API, instead of relying on the disassemblers to call the tryAdding* methods, maybe this could be done automagically using InstrInfo? For instance, even though PC-relative LEAs are used to get the address of string literals in a typical Mach-O file, a MOV would be used in an ELF file. And right now, the explicit symbolization only recognizes PC-relative LEAs. InstrInfo should have already have most of what is needed to know what to symbolize, so this can definitely be improved. I'd also like to remove object::RelocationRef::getValueString (it seems only used by relocation printing in objdump), as simply printing the created MCExpr is definitely enough (and cleaner than string concats). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182625 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge remote-tracking branch 'upstream/master' into merge-20130502Stephen Hines2013-05-021-167/+180
|\ \ | |/ | | | | | | | | | | | | Conflicts: lib/Support/Unix/Signals.inc unittests/Transforms/Utils/Cloning.cpp Change-Id: I027581a4390ec3ce4cd8d33da8b5f4c0c7d372c8
| * X86DisassemblerDecoder.c: Make this C89-compliant.NAKAMURA Takumi2013-03-251-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177910 91177308-0d34-0410-b5e6-96231b3b80d8
| * Whitespace.NAKAMURA Takumi2013-03-251-160/+160
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177909 91177308-0d34-0410-b5e6-96231b3b80d8
| * x86 -- disassemble the REP/REPNE prefix when neededDave Zarzycki2013-03-251-7/+20
| | | | | | | | | | | | This fixes Apple bug: 13493622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177887 91177308-0d34-0410-b5e6-96231b3b80d8
* | Update LLVM for merge to r171905.Stephen Hines2013-01-211-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Android.mk lib/Analysis/Android.mk lib/CodeGen/Android.mk lib/CodeGen/MachineScheduler.cpp - specify std::pop_heap() lib/IR/Android.mk - new from lib/VMCore lib/MC/Android.mk lib/MC/MCAssembler.cpp - put back pointer param (from reference). lib/Support/DeltaAlgorithm.cpp - iterator -> const_iterator ! lib/TableGen/Android.mk lib/Target/ARM/ARMJITInfo.cpp - Removed unused legacy JIT changes lib/Target/ARM/Android.mk lib/Target/ARM/AsmParser/Android.mk lib/Target/ARM/Disassembler/Android.mk lib/Target/ARM/MCTargetDesc/Android.mk lib/Target/Android.mk lib/Target/Mips/Android.mk lib/Target/Mips/Disassembler/Android.mk lib/Target/Mips/MCTargetDesc/Android.mk lib/Target/X86/Android.mk lib/Target/X86/AsmParser/Android.mk lib/Target/X86/Disassembler/Android.mk lib/Transforms/IPO/Android.mk lib/Transforms/Instrumentation/Android.mk lib/Transforms/Scalar/Android.mk lib/Transforms/Utils/Android.mk lib/Transforms/Vectorize/Android.mk lib/VMCore/Android.mk - moved to lib/IR llvm-gen-intrinsics.mk - new Intrinsics.td location utils/TableGen/Android.mk Change-Id: Ifebdb1716c372fd917a844c44be9d10df66434b0
* | Merge remote-tracking branch 'upstream/master' into merge-llvmStephen Hines2013-01-215-16/+14
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | Conflicts: lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp lib/MC/MCAssembler.cpp lib/Support/Atomic.cpp lib/Support/Memory.cpp lib/Target/ARM/ARMJITInfo.cpp Change-Id: Ib339baf88df5b04870c8df1bedcfe1f877ccab8d
| * Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky2012-12-192-10/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578 91177308-0d34-0410-b5e6-96231b3b80d8
| * Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fix typoJoerg Sonnenberger2012-10-291-2/+2
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166945 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add a new compression type to ModRM table that detects when the memory modRM ↵Craig Topper2012-09-132-0/+9
| | | | | | | | | | | | byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163774 91177308-0d34-0410-b5e6-96231b3b80d8
| * Change unsigned to a uint16_t in static disassembler tables to reduce the ↵Craig Topper2012-09-112-2/+2
| | | | | | | | | | | | table size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163594 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge branch 'upstream' into merge-2012_09_10Stephen Hines2012-09-103-14/+16
|\ \ | |/ | | | | | | | | | | | | | | Conflicts: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp lib/Support/DynamicLibrary.cpp lib/Support/LockFileManager.cpp Change-Id: I91e94c3a7a76e19c688307c5a480a640a3bd2b7e
| * Use const properly so that we dont remove const qualifier from region and MIIRoman Divacky2012-09-053-13/+13
| | | | | | | | | | | | | | by casting. Found with gcc48. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163247 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add support for converting llvm.fma to fma4 instructions.Craig Topper2012-08-311-0/+2
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162999 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-241-1/+1
| | | | | | | | | | | | | | Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge branch 'upstream' into merge_2Stephen Hines2012-08-235-64/+67
|\ \ | |/ | | | | | | | | | | Conflicts: lib/Target/ARM/ARMCodeEmitter.cpp Change-Id: I6702d340c733e9721499b5d85b13b96ad9c14eb5
| * Add more indirection to the disassembler tables to reduce amount of space ↵Craig Topper2012-08-015-14/+18
| | | | | | | | | | | | used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161101 91177308-0d34-0410-b5e6-96231b3b80d8
| * Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove ↵Craig Topper2012-07-311-5/+4
| | | | | | | | | | | | trailing whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161029 91177308-0d34-0410-b5e6-96231b3b80d8
| * Tidy up trailing whitespaceCraig Topper2012-07-311-33/+33
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161027 91177308-0d34-0410-b5e6-96231b3b80d8
| * Tidy up trailing whitespaceCraig Topper2012-07-311-12/+12
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161026 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fix a bug in the x86 disassembler's symbolic disassembly support for Jcc-JumpKevin Enderby2012-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if Condition Is Met instuctions that was not correctly determining the target instruction. So for a jne rel32 instruction: % cat x.s .byte 0x0f, 0x85, 0x09, 0x00, 0x00, 0x00 % as x.s it was incorrectly deterining the target: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xd and with the fix it gets this correct as: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xf rdar://11505997 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160694 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge with LLVM upstream r160668 (Jul 24th 2012)Shih-wei Liao2012-08-032-10/+46
|\ \ | |/ | | | | | | | | | | | | | | | | Conflicts: include/llvm/Support/ELF.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Support/Memory.cpp lib/Transforms/Instrumentation/AddressSanitizer.cpp Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
| * Remove tabs.Bill Wendling2012-07-191-9/+9
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160477 91177308-0d34-0410-b5e6-96231b3b80d8
| * X86: add more GATHER intrinsics in LLVMManman Ren2012-06-291-10/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Corrected type for index of llvm.x86.avx2.gather.d.pd.256 from 256-bit to 128-bit. Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256 from 256-bit to 128-bit. Support the following intrinsics: llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256 llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159402 91177308-0d34-0410-b5e6-96231b3b80d8
| * X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-262-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
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