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path: root/lib/Target/X86/X86InstrFormats.td
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* Instruction fixes, added instructions, and AsmString changes in theSean Callanan2009-12-181-14/+27
* PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 inst...Nate Begeman2009-10-191-2/+2
* Modified the Intel instruction tables to includeSean Callanan2009-09-151-0/+18
* Implement sse4.2 string/text processing instructions:Eric Christopher2009-08-181-1/+5
* Add crc32 instruction and intrinsics. Add a new class of prefixEric Christopher2009-08-081-0/+6
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-111-0/+3
* Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use theBill Wendling2008-08-271-4/+8
* Nevermind. This broke the bootstrap (?!).Bill Wendling2008-08-251-8/+4
* MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of theseBill Wendling2008-08-251-4/+8
* Provide a 64 bit variant of mmx.maskmovq intrinsic lowering.Anton Korobeynikov2008-08-231-0/+3
* Fix comment spacing.Dan Gohman2008-08-201-1/+1
* SSE codegen for vsetcc nodesNate Begeman2008-07-171-0/+6
* Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc...Evan Cheng2008-03-141-3/+3
* Add lock prefix support to x86. Also add the instructions necessary for the ...Andrew Lenharth2008-03-011-0/+2
* SSE4.1 64b integer insert/extract pattern supportNate Begeman2008-02-121-0/+29
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Fix JIT encoding for CMPSD as well.Evan Cheng2007-12-201-0/+4
* Fix the JIT encoding of cmp*ss, which aborts with this assertion currently:Chris Lattner2007-12-161-0/+2
* Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v...Evan Cheng2007-07-311-0/+232
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