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path: root/lib/Target/X86/X86InstrInfo.cpp
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* Remove intrinsic specific instructions for SSE/SSE2/AVX floating point max/mi...Craig Topper2012-12-291-20/+0
* Remove alignment from a bunch more VEX encoded operations in the folding tables.Craig Topper2012-12-261-47/+47
* Remove alignment from folding table for VMOVUPD as an unaligned instruction i...Craig Topper2012-12-261-1/+1
* Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit...Craig Topper2012-12-261-2/+2
* Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171...Craig Topper2012-12-261-2/+2
* VCVTSS2SD requires a strict alignment. Thanks Elena.Nadav Rotem2012-12-251-2/+2
* Some x86 instructions can load/store one of the operands to memory. On SSE, t...Nadav Rotem2012-12-241-260/+260
* In some cases, due to scheduling constraints we copy the EFLAGS.Nadav Rotem2012-12-211-0/+2
* X86: Match the SSE/AVX min/max vector ops using a custom node instead of intr...Benjamin Kramer2012-12-211-0/+24
* Remove the explicit MachineInstrBuilder(MI) constructor.Jakob Stoklund Olesen2012-12-191-18/+21
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-191-2/+2
* Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add...Craig Topper2012-12-171-0/+2
* Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and...Craig Topper2012-12-171-1/+26
* Remove store forms of DEC/INC from isDefConvertible. Since they are stores th...Craig Topper2012-12-171-6/+2
* Mark MOVDQ(A/U)rm as ReMaterializable. Mark all MOVDQ(A/U) instructions as ne...Craig Topper2012-12-061-0/+3
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
* Remove all references to TargetInstrInfoImpl.Jakob Stoklund Olesen2012-11-281-3/+3
* X86: do not fold load instructions such as [V]MOVS[S|D] to other instructionsManman Ren2012-11-271-0/+15
* Remove alignments from folding tables for scalar FMA4 instructions.Craig Topper2012-11-041-16/+16
* Add scalar forms of FMA4 VFNMSUB/VFNMADD to folding tables. Patch from Camero...Craig Topper2012-10-311-0/+8
* Create enums for the different attributes.Bill Wendling2012-10-091-2/+4
* Move expansion of SETB_C(8/16/32/64)r from MCInstLower to ExpandPostRAPseudos...Craig Topper2012-10-051-0/+8
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-271-1/+1
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-1/+1
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-261-2/+2
* Add SARX/SHRX/SHLX code generation supportMichael Liao2012-09-261-0/+6
* Add RORX code generation supportMichael Liao2012-09-261-0/+4
* Add MULX code generation supportMichael Liao2012-09-261-0/+4
* Re-work X86 code generation of atomic ops with spin-loopMichael Liao2012-09-201-2/+2
* Add some cases to x86 OptimizeCompare to handle DEC and INC, too.Jan Wen Voung2012-09-171-4/+14
* Mark FMA4 instructions as commutable and add them to the folding tables.Craig Topper2012-08-311-0/+60
* Add selection of RegOp2MemOpTable3 to canFoldMemoryOperandCraig Topper2012-08-311-0/+2
* Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.Craig Topper2012-08-281-4/+5
* Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.Craig Topper2012-08-281-9/+6
* Preserve operand flags in convertToThreeAddress() by copying operands.Jakob Stoklund Olesen2012-08-231-67/+52
* Use a switch statement instead of a bunch of if-else checks and pull out the ...Craig Topper2012-08-231-8/+10
* Fix up indentation and remove a couple else's after returns.Craig Topper2012-08-211-11/+12
* Use uint16_t for tables of opcodes.Craig Topper2012-08-211-2/+2
* Fix up indentation. No functional change.Craig Topper2012-08-211-61/+61
* Add a couple llvm_unreachables. Add a message to several others.Craig Topper2012-08-211-8/+6
* Replace a break with llvm_unreachable in the default case of a nested switch....Craig Topper2012-08-211-50/+18
* Remove FMA3 intrinsic instructions in favor of patterns.Craig Topper2012-08-201-24/+0
* X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr fromManman Ren2012-08-131-6/+6
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-0/+80
* Don't scan physreg use-def chains looking for a PIC base.Jakob Stoklund Olesen2012-08-081-10/+4
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-0/+75
* Added FMA functionality to X86 target.Elena Demikhovsky2012-08-011-32/+34
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-69/+0
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+69
* X86 Peephole: fix PR13475 in optimizeCompare.Manman Ren2012-07-281-3/+7
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