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path: root/lib/Target/X86/X86Subtarget.cpp
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* Whitespace.Chad Rosier2012-08-011-13/+13
* Adds the family codes for the Midview Atom processors so that thePreston Gurd2012-07-191-1/+1
* This patch fixes 8 out of 20 unexpected failures in "make check"Preston Gurd2012-07-181-1/+2
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-031-3/+3
* Enable automatic detection of FMA3 support to allow intrinsics to be used.Craig Topper2012-06-011-6/+4
* X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer2012-05-311-3/+3
* Added FMA3 Intel instructions.Elena Demikhovsky2012-05-311-4/+6
* Change the Intel Atom detection code to recognizePreston Gurd2012-05-021-1/+2
* Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.Craig Topper2012-05-011-9/+9
* Trivial change to set UseLeaForSP flag in addition to togglingPreston Gurd2012-04-261-0/+2
* Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei...Craig Topper2012-04-261-7/+5
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-3/+1
* Temporarily turn off anti-dependency checkingPreston Gurd2012-04-161-1/+3
* Prune some includesCraig Topper2012-03-271-1/+0
* Remove extra semi-colons.Chad Rosier2012-02-221-1/+1
* Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.Evan Cheng2012-02-071-0/+2
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-1/+30
* PR11834: Use macros which are defined on Windows. Patch by Marina Yatsina.Evan Cheng2012-01-301-1/+2
* Default stack alignment for 32bit x86 should be 4 Bytes, not 8 Bytes.Joerg Sonnenberger2012-01-101-1/+1
* Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr...Craig Topper2012-01-091-8/+3
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper2012-01-091-1/+1
* Change XOP detection to use the correct CPUID bit instead of using the FMA4 bit.Craig Topper2011-12-291-9/+13
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-3/+0
* Add XOP feature flag.Jan Sjödin2011-12-021-0/+3
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper2011-10-301-0/+11
* Remove NaClModeDavid Meyer2011-10-181-7/+1
* Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means ...Craig Topper2011-10-171-8/+9
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-161-0/+5
* Add X86 feature detection support for BMI instructions. Added new cpuid funct...Craig Topper2011-10-161-18/+34
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-141-0/+1
* Add X86 LZCNT instruction. Including instruction selection support.Craig Topper2011-10-111-0/+5
* Put a bunch of calls to ToggleFeature behind proper if statements.Craig Topper2011-10-101-17/+42
* Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa...Craig Topper2011-10-091-0/+2
* Add support for MOVBE and RDRAND instructions for the assembler and disassemb...Craig Topper2011-10-031-0/+4
* Detect attempt to use segmented stacks on non ELF systems and errorRafael Espindola2011-09-071-0/+5
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-051-1/+7
* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-261-0/+2
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-2/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-24/+46
* Really force on 64bit for 64-bit targets. Should fix remaining failures on u...Eli Friedman2011-07-081-3/+11
* Revert earlier unnecessary hack. Make sure we correctly force on 64bit and c...Eli Friedman2011-07-081-3/+8
* Restore old behavior. Always auto-detect features unless cpu or features are ...Evan Cheng2011-07-081-18/+5
* Default 64-bit target features and SSE2 on when a triple specifies x86-64. C...Eli Friedman2011-07-081-10/+0
* For non-x86 host, used generic as CPU name.Evan Cheng2011-07-081-5/+10
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+2
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-83/+32
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-2/+2
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-1/+1
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-2/+8
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