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* Add relax all support to the COFF object streamer.Michael J. Spencer2010-07-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109947 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MC use Windows COFF on Windows and add tests.Michael J. Spencer2010-07-271-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109494 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKillJakob Stoklund Olesen2010-07-161-8/+0
| | | | | | | | | pass that inserted it. It is no longer necessary to limit the live ranges of FP registers to a single basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108536 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow x87 FP registers to be alive globally in a function.Jakob Stoklund Olesen2010-07-161-1/+6
| | | | | | | | | | | | | | | | FP_REG_KILL instructions are still inserted, but can be disabled by passing -live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly. CFG edges are partioned into bundles where the x87 stack must be allocated identically. Code is insertad at the end of each basic block that shuffles the live FP registers to match the outgoing bundles expectations. This fix is in preparation for some upcoming register allocator improvements that may extend the live range of registers beyond a basic block, similar to LICM. It also provides a nice runtime speedup if you are building with -mfpmath=387. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108529 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-0/+4
| | | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-061-3/+3
| | | | | | | | the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r107655.Dan Gohman2010-07-061-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-061-3/+3
| | | | | | | the pseudo instruction is not at the end of the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
* Currently, createMachOStreamer() is invoked directly in llvm-mc whichMatt Fleming2010-05-211-0/+20
| | | | | | | | | | | isn't ideal if we want to be able to use another object file format. Add a createObjectStreamer() factory method so that the correct object file streamer can be instantiated for a given target triple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104318 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-111-1/+2
| | | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 102941, we're going to do this via attr and can justEric Christopher2010-05-051-8/+1
| | | | | | | hack the code to turn it off when debugging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103083 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option, defaulting to off, to disable the sse domain crossing opts.Eric Christopher2010-05-031-1/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102941 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim include.Evan Cheng2010-04-211-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101978 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR6696 and PR6663Jim Grosbach2010-04-061-0/+1
| | | | | | | | | | | | | | | | | | | When a frame pointer is not otherwise required, and dynamic stack alignment is necessary solely due to the spilling of a register with larger alignment requirements than the default stack alignment, the frame pointer can be both used as a general purpose register and a frame pointer. That goes poorly, for obvious reasons. This patch brings back a bit of old logic for identifying the use of such registers and conservatively reserves the frame pointer during register allocation in such cases. For now, implement for X86 only since it's 32-bit linux which is hitting this, and we want a targeted fix for 2.7. As a follow-on, this will be expanded to handle other targets, as theoretically the problem could arise elsewhere as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable -sse-domain-fix by default. Now with tests!Jakob Stoklund Olesen2010-03-301-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99954 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Enable -sse-domain-fix by default. What could possibly go wrong?"Jakob Stoklund Olesen2010-03-301-1/+6
| | | | | | Not running 'make check-all' before committing is a bad idea. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99933 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable -sse-domain-fix by default. What could possibly go wrong?Jakob Stoklund Olesen2010-03-301-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99931 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain ↵Jakob Stoklund Olesen2010-03-251-0/+15
| | | | | | | | | | | | | | | | | | | | | | crossings. On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register in a different domain than where it was defined. Some instructions have equvivalents for different domains, like por/orps/orpd. The SSEDomainFix pass tries to minimize the number of domain crossings by changing between equvivalent opcodes where possible. This is a work in progress, in particular the pass doesn't do anything yet. SSE instructions are tagged with their execution domain in TableGen using the last two bits of TSFlags. Note that not all instructions are tagged correctly. Life just isn't that simple. The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline issue handled by NEONMoveFixPass. This pass may become target independent to handle both. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99524 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid ↵Jakob Stoklund Olesen2010-03-231-15/+0
| | | | | | | | domain crossings." This reverts commit 99345. It was breaking buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99352 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain ↵Jakob Stoklund Olesen2010-03-231-0/+15
| | | | | | | | | crossings. This is work in progress. So far, SSE execution domain tables are added to X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99345 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.Daniel Dunbar2010-03-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99097 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Add stub AsmBackend.Daniel Dunbar2010-02-211-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96763 91177308-0d34-0410-b5e6-96231b3b80d8
* Preliminary patch to improve dwarf EH generation - Hooks to return ↵Anton Korobeynikov2010-02-151-29/+0
| | | | | | Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop winmcasminfo and use normal AT&T COFF for all windows targets.Anton Korobeynikov2010-02-141-2/+1
| | | | | | | Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and there is no way to override this behaviour. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96165 91177308-0d34-0410-b5e6-96231b3b80d8
* rip out the 'heinous' x86 MCCodeEmitter implementation.Chris Lattner2010-02-131-3/+2
| | | | | | | | We still have the templated X86 JIT emitter, *and* the almost-copy in X86InstrInfo for getting instruction sizes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
* Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng2010-02-061-4/+0
| | | | | | | | | | | only run for x86 with fastisel. I've found it being very effective in eliminating some obvious dead code as result of formal parameter lowering especially when tail call optimization eliminated the need for some of the loads from fixed frame objects. It also shrinks a number of the tests. A couple of tests no longer make sense and are now eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
* stub out a new X86 encoder, which can be tried withChris Lattner2010-02-031-0/+1
| | | | | | | -enable-new-x86-encoder until its stable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95256 91177308-0d34-0410-b5e6-96231b3b80d8
* rename createX86MCCodeEmitter to more accurately reflect what it creates.Chris Lattner2010-02-031-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95254 91177308-0d34-0410-b5e6-96231b3b80d8
* remove dead code.Chris Lattner2010-02-021-23/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95144 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate all the dead addSimpleCodeEmitter implementations.Chris Lattner2010-02-021-21/+0
| | | | | | | | | eliminate random "code emitter" stuff in Alpha, except for the JIT path. Next up, remove the template cruft. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95131 91177308-0d34-0410-b5e6-96231b3b80d8
* For aligned load/store instructions, it's only required to know whether aJim Grosbach2010-01-191-3/+0
| | | | | | | | | | | | | function can support dynamic stack realignment. That's a much easier question to answer at instruction selection stage than whether the function actually will have dynamic alignment prologue. This allows the removal of the stack alignment heuristic pass, and improves code quality for cases where the heuristic would result in dynamic alignment code being generated when it was not strictly necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93885 91177308-0d34-0410-b5e6-96231b3b80d8
* Even more explanation.Bill Wendling2010-01-191-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93841 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add getLSDAEncoding to the PowerPC backend.Bill Wendling2010-01-181-1/+8
| | | | | | | - Greatly improve the comments to the getLSDAEncoding method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93796 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FIXME comment.Bill Wendling2010-01-181-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93755 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add a comment to the callback indicating that it's *extremely* not a goodBill Wendling2010-01-181-2/+2
| | | | | | | | | idea, but unfortunately necessary. - Default to using 4-bytes for the LSDA pointer encoding to agree with the encoded value in the CIE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93753 91177308-0d34-0410-b5e6-96231b3b80d8
* Retrying r91337:Bill Wendling2010-01-161-0/+7
| | | | | | | | | The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine, but we need it to actually be 4-bytes in the FDE for some platforms. Allow individual platforms to decide for themselves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93616 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed library dependencies between the X86 disassembler andSean Callanan2009-12-221-4/+0
| | | | | | | X86 codegen that were causing circular symbol dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91871 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix setting and default setting of code model for jit. Do thisEric Christopher2009-12-211-11/+20
| | | | | | | | | | | by allowing backends to override routines that will default the JIT and Static code generation to an appropriate code model for the architecture. Should fix PR 5773. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
* Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit Sean Callanan2009-12-191-0/+4
| | | | | | | | | | | | | | | | | | | | | incarnations), integrated into the MC framework. The disassembler is table-driven, using a custom TableGen backend to generate hierarchical tables optimized for fast decode. The disassembler consumes MemoryObjects and produces arrays of MCInsts, adhering to the abstract base class MCDisassembler (llvm/MC/MCDisassembler.h). The disassembler is documented in detail in - lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime) - utils/TableGen/DisassemblerEmitter.cpp (table emitter) You can test the disassembler by running llvm-mc -disassemble for i386 or x86_64 targets. Please let me know if you encounter any problems with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor the stack alignment calculations out into a target independent pass.Jim Grosbach2009-12-021-1/+1
| | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
* Make X86-64 in the Large model always emit 64-bit calls.Jeffrey Yasskin2009-11-161-14/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The large code model is documented at http://www.x86-64.org/documentation/abi.pdf and says that calls should assume their target doesn't live within the 32-bit pc-relative offset that fits in the call instruction. To do this, we turn off the global-address->target-global-address conversion in X86TargetLowering::LowerCall(). The first attempt at this broke the lazy JIT because it can separate the movabs(imm->reg) from the actual call instruction. The lazy JIT receives the address of the movabs as a relocation and needs to record the return address from the call; and then when that call happens, it needs to patch the movabs with the newly-compiled target. We could thread the call instruction into the relocation and record the movabs<->call mapping explicitly, but that seems to require at least as much new complication in the code generator as this change. To fix this, we make lazy functions _always_ go through a call stub. You'd think we'd only have to force lazy calls through a stub on difficult platforms, but that turns out to break indirect calls through a function pointer. The right fix for that is to distinguish between calls and address-of operations on uncompiled functions, but that's complex enough to leave for someone else to do. Another attempt at this defined a new CALL64i pseudo-instruction, which expanded to a 2-instruction sequence in the assembly output and was special-cased in the X86CodeEmitter's emitInstruction() function. That broke indirect calls in the same way as above. This patch also removes a hack forcing Darwin to the small code model. Without far-call-stubs, the small code model requires things of the JITMemoryManager that the DefaultJITMemoryManager can't provide. Thanks to echristo for lots of testing! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88984 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass StringRef by value.Daniel Dunbar2009-11-061-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86251 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/X86: Implement single instruction encoding interface for MC.Daniel Dunbar2009-08-271-0/+4
| | | | | | | | | | | | | - Note, this is a gigantic hack, with the sole purpose of unblocking further work on the assembler (its also possible to test the mathcer more completely now). - Despite being a hack, its actually good enough to work over all of 403.gcc (although some encodings are probably incorrect). This is a testament to the beauty of X86's MachineInstr, no doubt! ;) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80234 91177308-0d34-0410-b5e6-96231b3b80d8
* rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.Chris Lattner2009-08-221-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79773 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-14/+21
| | | | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
* pass the TargetTriple down from each target ctor to theChris Lattner2009-08-111-1/+1
| | | | | | | LLVMTargetMachine ctor. It is currently unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a random reference to subtarget. Even without this, weChris Lattner2009-08-041-2/+0
| | | | | | | | | | still get "intel syntax" instructions from llc with -x86-asm-syntax=intel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78103 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak Win64 CC. Step one: honour register save area, fix some alignment ↵Anton Korobeynikov2009-08-031-1/+3
| | | | | | and provide a different set of call-clobberred registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-7/+6
| | | | | | | - The C, C++, MSIL, and Mips backends still need the module. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
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