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* Reapply r113585. The msvc machine is mercurial.Bill Wendling2010-09-101-2/+2
* r113585 was causing clang-i686-xp-msvc9 to fail in mysterious ways that I can'tBill Wendling2010-09-101-2/+2
* Calculate the number of VLDM/VSTM registers by subtracting the number ofBob Wilson2010-09-101-2/+2
* Mark the sse_load_f32 and sse_load_f64 load patterns as having memoperands soBill Wendling2010-09-101-2/+2
* Reword since this may not be a bug but intended behavior.Bill Wendling2010-09-101-10/+6
* Fix merging base-updates for VLDM/VSTM: Before I switched these instructionsBob Wilson2010-09-101-1/+2
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-1014-31/+69
* Fix build error.Eric Christopher2010-09-101-1/+1
* Update comments, reorganize some code, rename variables to beEric Christopher2010-09-101-43/+40
* 64-bit fp loads can come straight out of the constant pool, not asEric Christopher2010-09-091-10/+18
* SIToFP and FPToSI conversions work only on fp-reg to fp-reg. MoveEric Christopher2010-09-091-7/+33
* New "move to fp reg" routine. Use it.Eric Christopher2010-09-091-5/+12
* "Strike that, reverse it." -- Mr. Wonka.Eric Christopher2010-09-091-2/+2
* Add FPTrunc, fix some bugs where I forgot to update the value map.Eric Christopher2010-09-091-2/+28
* Basic FP->Int, Int->FP conversions.Eric Christopher2010-09-091-0/+55
* Add one more pattern to fallback movddupBruno Cardoso Lopes2010-09-091-0/+2
* For each instruction itinerary class, specify the number of micro-ops eachEvan Cheng2010-09-096-8/+97
* Make ELF OS ABI dependent on the OS from target triple.Roman Divacky2010-09-091-9/+12
* Move remaining MMX instructions from SSE to MMX.Dale Johannesen2010-09-092-107/+44
* Silence compiler warning.Kalle Raiskila2010-09-091-1/+1
* Fix NEON VLD pseudo instruction itineraries that were incorrectly copied fromBob Wilson2010-09-091-5/+5
* Nuke whitespace and fix some indenting.Eric Christopher2010-09-091-60/+60
* Move most MMX instructions (defined as anything thatDale Johannesen2010-09-092-121/+136
* Handle 64-bit floating point binops as well.Eric Christopher2010-09-091-10/+12
* Basic 32-bit FP operations.Eric Christopher2010-09-091-0/+45
* For double-spaced VLD3/VLD4 instructions, copy the explicit super-register useBob Wilson2010-09-091-5/+9
* Handle float->double extension.Eric Christopher2010-09-091-0/+23
* Rewrite TargetMaterializeConstant splitting it out into two functionsEric Christopher2010-09-091-21/+45
* Simplify copying over operands from pseudo NEON load/store instructions.Bob Wilson2010-09-091-30/+19
* Clean up a comment.Bob Wilson2010-09-081-2/+2
* Very basic compare support.Eric Christopher2010-09-081-0/+48
* Delete dead code.Eric Christopher2010-09-081-1/+0
* Fix LDM_RET schedule itinery.Evan Cheng2010-09-085-2/+19
* fix rdar://8407548, I missed the commuted form of xchg/test without a suffix.Chris Lattner2010-09-081-2/+4
* fix wonky formatting.Chris Lattner2010-09-081-1/+1
* fix bugs in push/pop segment support, rdar://8407242Chris Lattner2010-09-082-5/+36
* Add intrinsic-based patterns for MMX PINSRW and PEXTRW.Dale Johannesen2010-09-081-0/+19
* Make the loads/stores match the type we really want to store.Eric Christopher2010-09-081-12/+12
* Check in forgotten file. Should fix build.Dale Johannesen2010-09-081-1/+1
* Slight cleanup, use only one form of MMXI_binop_rm_int.Dale Johannesen2010-09-081-53/+37
* Re-enable usage of the ARM base pointer. r113394 fixed the known failures.Jim Grosbach2010-09-081-1/+1
* Fix errant fall-throughs causing the base pointer to be used when the frameJim Grosbach2010-09-081-3/+3
* Add intrinsic forms of mmx<->sse conversions. Notes:Dale Johannesen2010-09-081-0/+51
* Rewrite TargetMaterializeConstant.Eric Christopher2010-09-081-7/+18
* Minor change. Fix comments and remove unused and redundant codeBruno Cardoso Lopes2010-09-081-10/+3
* x86 vector shuffle lowering now relies only on target specificBruno Cardoso Lopes2010-09-082-6/+132
* Be more careful about when to do dynamic stack realignment. Since we have anJim Grosbach2010-09-081-2/+9
* Add missing assertJim Grosbach2010-09-081-1/+4
* Fix CellSPU vector shuffles, again.Kalle Raiskila2010-09-081-7/+7
* add support for the commuted form of the test instruction, rdar://8018260.Chris Lattner2010-09-081-0/+10