external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Mips16 does not use register scavenger from TargetRegisterInfo. It allocates	Reed Kotler	2013-05-21	1	-2/+2
*	[mips] Rename option to make it compatible with gcc.	Akira Hatanaka	2013-05-21	1	-1/+1
*	[mips] Add instruction selection patterns for blez and bgez.	Akira Hatanaka	2013-05-21	2	-0/+10
*	[NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic	Justin Holewinski	2013-05-21	4	-0/+24
*	Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.	Jyotsna Verma	2013-05-21	1	-1/+0
*	Fix PPC branch selection for counter-based branches	Hal Finkel	2013-05-21	1	-3/+9
*	removed commented lines	Elena Demikhovsky	2013-05-21	1	-2/+0
*	Removed SSEPacked domain from all forms (AVX, SSE, signed, unsigned) scalar c...	Elena Demikhovsky	2013-05-21	2	-25/+27
*	X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the s...	Benjamin Kramer	2013-05-21	1	-15/+19
*	Fix indentation	Richard Sandiford	2013-05-21	1	-9/+9
*	Add some additional functions to the list of helper functions for	Reed Kotler	2013-05-21	1	-2/+13
*	Rename LoopSimplify.h to LoopUtils.h	Hal Finkel	2013-05-20	1	-1/+1
*	[mips] Add (setne $lhs, 0) instruction selection pattern.	Akira Hatanaka	2013-05-20	1	-0/+2
*	[mips] Trap on integer division by zero.	Akira Hatanaka	2013-05-20	4	-5/+58
*	Remove copied preheader insertion logic from PPCCTRLoops	Hal Finkel	2013-05-20	1	-85/+3
*	[NVPTX] Fix mis-use of CurrentFnSym in NVPTXAsmPrinter. This was causing a s...	Justin Holewinski	2013-05-20	1	-9/+7
*	[NVPTX] Add programmatic interface to NVVMReflect pass	Justin Holewinski	2013-05-20	2	-3/+24
*	Rename PPC MTCTRse to MTCTRloop	Hal Finkel	2013-05-20	3	-7/+7
*	Add a PPCCTRLoops verification pass	Hal Finkel	2013-05-20	3	-0/+164
*	R600: Fix bug detected by GCC warning.	Benjamin Kramer	2013-05-20	1	-2/+2
*	R600/SI: Use a multiclass for MUBUF_Load_Helper	Tom Stellard	2013-05-20	2	-20/+30
*	R600/SI: Add a pattern for S_LOAD_DWORDX2_* instructions	Tom Stellard	2013-05-20	1	-0/+1
*	R600/SI: Add pattern for rotr	Tom Stellard	2013-05-20	1	-0/+2
*	R600: Swap the legality of rotl and rotr	Tom Stellard	2013-05-20	7	-28/+11
*	R600/SI: Add patterns for 64-bit shift operations	Tom Stellard	2013-05-20	2	-3/+22
*	R600/SI: Use the same names for VOP3 operands and encoding fields	Tom Stellard	2013-05-20	2	-37/+37
*	R600/SI: Make fitsRegClass() operands const	Tom Stellard	2013-05-20	2	-2/+3
*	VSTn instructions have a number of encoding constraints which are not impleme...	Mihai Popa	2013-05-20	2	-21/+72
*	Q registers are encoded in fields of the same length as D registers. As Q reg...	Mihai Popa	2013-05-20	1	-1/+1
*	[SystemZ] Add long branch pass	Richard Sandiford	2013-05-20	11	-34/+399
*	[NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs	Justin Holewinski	2013-05-20	7	-80/+525
*	[NVPTX] Fix i1 kernel parameters and global variables. ABI rules say we need...	Justin Holewinski	2013-05-20	1	-2/+12
*	PR15868 fix.	Stepan Dyatkovskiy	2013-05-20	5	-11/+69
*	Also expand 64-bit bitcasts.	Jakob Stoklund Olesen	2013-05-20	1	-0/+2
*	Implement spill and fill of I64Regs.	Jakob Stoklund Olesen	2013-05-20	1	-2/+9
*	Mark i64 SETCC as expand so it is turned into a SELECT_CC.	Jakob Stoklund Olesen	2013-05-20	1	-0/+2
*	Replace some bit operations with simpler ones. No functionality change.	Benjamin Kramer	2013-05-19	3	-12/+9
*	Don't use %g0 to materialize 0 directly.	Jakob Stoklund Olesen	2013-05-19	2	-4/+2
*	Select i64 values with %icc conditions.	Jakob Stoklund Olesen	2013-05-19	1	-0/+5
*	Add floating point selects on %xcc predicates.	Jakob Stoklund Olesen	2013-05-19	1	-0/+10
*	Implement SPselectfcc for i64 operands.	Jakob Stoklund Olesen	2013-05-19	2	-27/+31
*	[Sparc] Rearrange integer registers' allocation order so that register alloca...	Venkatraman Govindaraju	2013-05-19	2	-10/+23
*	Handle i64 FrameIndex nodes in SPARC v9 mode.	Jakob Stoklund Olesen	2013-05-19	1	-1/+1
*	Check InlineAsm clobbers in PPCCTRLoops	Hal Finkel	2013-05-18	1	-0/+15
*	AArch64: add CMake dependency to fix very parallel builds	Tim Northover	2013-05-18	1	-0/+2
*	X86: Bad peephole interaction between adc, MOV32r0	David Majnemer	2013-05-18	1	-3/+18
*	Add LLVMContext argument to getSetCCResultType	Matt Arsenault	2013-05-18	19	-38/+40
*	Support unaligned load/store on more ARM targets	JF Bastien	2013-05-17	2	-10/+46
*	Fix the build in c++11 mode.	Rafael Espindola	2013-05-17	1	-2/+2
*	R600: Lower int_load_input to copyFromReg instead of Register node	Vincent Lejeune	2013-05-17	1	-1/+5