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* Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo andAkira Hatanaka2012-07-3113-72/+268
| | | | | | | | MipsSERegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161092 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka2012-07-319-219/+415
| | | | | | | | | | | | MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161090 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Mips16InstrInfo.cpp and MipsSEInstrInfo.cpp to CMakeLists.txt.Akira Hatanaka2012-07-311-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161083 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-319-361/+624
| | | | | | | | and MipsSEInstrInfo (for mips32/64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161081 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete mips64 target machine classes. mips target machines can be used in placeAkira Hatanaka2012-07-312-88/+46
| | | | | | | | of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161080 91177308-0d34-0410-b5e6-96231b3b80d8
* Let PEI::calculateFrameObjectOffsets compute the final stack size rather thanAkira Hatanaka2012-07-312-12/+1
| | | | | | | | computing it in MipsFrameLowering::emitPrologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161078 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-314-66/+6
| | | | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
* Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whetherAkira Hatanaka2012-07-314-38/+33
| | | | | | | | | or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and PseudoSE (mips32/64 pseudo) classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
* Change name of class MipsInst to InstSE to distinguish it from mips16'sAkira Hatanaka2012-07-312-16/+16
| | | | | | | | instruction class. SE stands for standard encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161069 91177308-0d34-0410-b5e6-96231b3b80d8
* When store nodes or memcpy nodes are created to copy the function callAkira Hatanaka2012-07-312-48/+32
| | | | | | | | | arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and integer offset operands rather than frame object operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161068 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier2012-07-311-2/+4
| | | | | | | Previously, we were using EBX, but PIC requires the GOT to be in EBX before function calls via PLT GOT pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined asAkira Hatanaka2012-07-313-38/+17
| | | | | | | | | | | single-precision load and store. Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect to map unaligned floating point load/store nodes to these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
* Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove ↵Craig Topper2012-07-311-5/+4
| | | | | | trailing whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161029 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up trailing whitespaceCraig Topper2012-07-311-33/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161027 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up trailing whitespaceCraig Topper2012-07-311-12/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161026 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cppKevin Enderby2012-07-301-2/+9
| | | | | | | | | | where the other_half of the movt and movw relocation entries needs to get set and only with the 16 bits of the other half. rdar://10038370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160978 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoadCraig Topper2012-07-301-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160953 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The ↵Craig Topper2012-07-301-0/+2
| | | | | | isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160951 91177308-0d34-0410-b5e6-96231b3b80d8
* Give VCVTTPD2DQ priority over CVTTPD2DQ.Craig Topper2012-07-301-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160942 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.Craig Topper2012-07-303-43/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160941 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form. ↵Craig Topper2012-07-301-9/+10
| | | | | | Add an OptForSpeed to explicitly pair up with an OptForSize that was already on another pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160939 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix load types on intrinsic forms of SS2SD and SD2SS AVX/SSE convert ↵Craig Topper2012-07-291-26/+41
| | | | | | instruction patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160938 91177308-0d34-0410-b5e6-96231b3b80d8
* Move more SSE/AVX convert instruction patterns into their definitions.Craig Topper2012-07-291-70/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160937 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-292-77/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold patterns for some of the SSE/AVX convert instructions into their ↵Craig Topper2012-07-281-49/+34
| | | | | | instruction definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160922 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark some of the SSE/AVX convert instructions as mayLoad/neverHasSideEffects.Craig Topper2012-07-281-22/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160921 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-282-0/+77
| | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
* Make CVTSS2SI instruction definition consistent with CVTSD2SI.Craig Topper2012-07-281-34/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160914 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up memory load types for SSE scalar convert intrinsic patterns.Craig Topper2012-07-281-27/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160913 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fix PR13475 in optimizeCompare.Manman Ren2012-07-281-3/+7
| | | | | | | | | | It is possible that an instruction can use and update EFLAGS. When checking the safety, we should check the usage of EFLAGS first before declaring it is safe to optimize due to the update. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160912 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass the correct call frame size to callseq_start node. This is needed toAkira Hatanaka2012-07-261-15/+10
| | | | | | | | | replace uses of function getMaxCallFrameSize defined in MipsFunctionInfo with the one MachineFrameInfo has. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160841 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the X86 sub_ss and sub_sd sub-register indexes completely.Jakob Stoklund Olesen2012-07-261-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160833 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the last mentions of sub_ss and sub_sd from patterns.Jakob Stoklund Olesen2012-07-261-4/+4
| | | | | | I'll remove these two sub-register indexes shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160831 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate sub_ss, sub_sd from broadcast patterns.Jakob Stoklund Olesen2012-07-261-42/+16
| | | | | | | | The (COPY_TO_REGCLASS GR32:$src, VR128) pattern looks odd, but copyPhysReg does the right thing with it. (The old pattern would eventually produce the same cross-class copy). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160830 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more sub_ss / sub_sd patterns.Jakob Stoklund Olesen2012-07-261-32/+24
| | | | | | | This gets rid of some more INSERT_SUBREG - IMPLICIT_DEF patterns, simplifying the emitted code a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160820 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate some SUBREG_TO_REG patterns with sub_ss and sub_sd.Jakob Stoklund Olesen2012-07-261-12/+10
| | | | | | | | | The SUBREG_TO_REG instruction has magic semantics asserting that the source value was defined by an instruction that cleared the high half of the register. Those semantics are never actually exploited for xmm registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160818 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate a batch of uses of sub_ss and sub_sd in the X86 target.Jakob Stoklund Olesen2012-07-261-82/+66
| | | | | | | | | | | | | | These idempotent sub-register indices don't do anything --- They simply map XMM registers to themselves. They no longer affect register classes either since the SubRegClasses field has been removed from Target.td. This patch replaces XMM->XMM EXTRACT_SUBREG and INSERT_SUBREG patterns with COPY_TO_REGCLASS patterns which simply become COPY instructions. The number of IMPLICIT_DEF instructions before register allocation is reduced, and that is the cause of the test case changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160816 91177308-0d34-0410-b5e6-96231b3b80d8
* Make l/q suffixes on AVX forms of scalar convert instructions consistent ↵Craig Topper2012-07-261-12/+15
| | | | | | with their non-AVX forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160775 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix call setup for PIC.Akira Hatanaka2012-07-262-6/+40
| | | | | | | Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160774 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Don't assume an SDNode is a constant.Jim Grosbach2012-07-251-0/+4
| | | | | | | | | Before accessing a node as a ConstandSDNode, make sure it actually is one. No testcase of non-trivial size. rdar://11948669 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160735 91177308-0d34-0410-b5e6-96231b3b80d8
* make all Emit*() functions consult the TargetLibraryInfo information before ↵Nuno Lopes2012-07-251-1/+2
| | | | | | | | | creating a call to a library function. Update all clients to pass the TLI information around. Previous draft reviewed by Eli. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160733 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typos. Thanks to Matt Beaumont-Gay for noticing it.Rafael Espindola2012-07-251-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160731 91177308-0d34-0410-b5e6-96231b3b80d8
* When a return struct pointer is passed in registers, the called has nothingRafael Espindola2012-07-252-12/+31
| | | | | | to pop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160725 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor a long list of conditions into a predicate function. No functionalityRafael Espindola2012-07-251-6/+15
| | | | | | change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160724 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate the stack slot used to save the global base register.Akira Hatanaka2012-07-254-59/+15
| | | | | | | | | | The long branch pass (fixed in r160601) no longer uses the global base register to compute addresses of branch destinations, so it is not necessary to reserve a slot on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160703 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the x86 disassembler's symbolic disassembly support for Jcc-JumpKevin Enderby2012-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if Condition Is Met instuctions that was not correctly determining the target instruction. So for a jne rel32 instruction: % cat x.s .byte 0x0f, 0x85, 0x09, 0x00, 0x00, 0x00 % as x.s it was incorrectly deterining the target: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xd and with the fix it gets this correct as: % otool -q -tv a.out a.out: (__TEXT,__text) section 0000000000000000 jne 0xf rdar://11505997 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160694 91177308-0d34-0410-b5e6-96231b3b80d8
* add a few more functions to TargetLibraryInfo:Nuno Lopes2012-07-241-0/+7
| | | | | | fputc, memchr, memcmp, putchar, puts, strchr, strncmp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160690 91177308-0d34-0410-b5e6-96231b3b80d8
* ELF does not imply GNU/Linux. Do not assume GNU conventions just because weDavid Chisnall2012-07-241-1/+1
| | | | | | | | | | | are targeting an ELF platform. Only fold gs-relative (and fs-relative) loads if it is actually sensible to do so for the target platform. This fixes PR13438. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160687 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLibraryInfo: add strn?cat, strn?cpy, and strn?lenNuno Lopes2012-07-241-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160678 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix function MipsCodeEmitter::emitExternalSymbolAddress to pass testAkira Hatanaka2012-07-241-1/+1
| | | | | | | | | | ExecutionEngine/test-fp.ll. Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160653 91177308-0d34-0410-b5e6-96231b3b80d8
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