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* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-0531-36/+36
| | | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMemDan Gohman2010-08-051-9/+3
| | | | | | | to IntrReadWriteArgMem, as it's for reading as well as writing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
* Support very basic (doesn't include ABI support in the front-end, varags, ↵Bruno Cardoso Lopes2010-08-052-4/+30
| | | | | | ...) 256-bit argument passing and return for AVX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110394 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle the memory barrier pseudo that goes to nothing for the JIT.Eric Christopher2010-08-051-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110371 91177308-0d34-0410-b5e6-96231b3b80d8
* Set hasSideEffects on the 64-bit no-sse memory barrier.Eric Christopher2010-08-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110369 91177308-0d34-0410-b5e6-96231b3b80d8
* For local variables in functions with a frame pointer, use FP as a baseJim Grosbach2010-08-052-18/+39
| | | | | | | | | | | register for local access when it's closer to the stack slot being refererenced than the stack pointer. Make sure to take into account any argument frame SP adjustments that are in affect at the time. rdar://8256090 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110366 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix indentation.Bob Wilson2010-08-051-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110363 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an ARM RSCrr instruction for disassembly only.Bob Wilson2010-08-051-0/+8
| | | | | | | Partial fix for PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110361 91177308-0d34-0410-b5e6-96231b3b80d8
* Be a little bit more specific about target for the memory barrierEric Christopher2010-08-052-2/+4
| | | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110360 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle the pseudo in MCInstLower.Eric Christopher2010-08-051-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110359 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an ARM RSBrr instruction for disassembly only.Bob Wilson2010-08-051-1/+9
| | | | | | | Partial fix for PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110358 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence a GCC warning about && and || without explicit parentheses. ThisChandler Carruth2010-08-051-3/+3
| | | | | | | | preserves the existing behavior, as it seems a concious choice to allow RS to be null and BigStack marked true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110307 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM "rrx" shift operands do not have an immediate. PR7790.Bob Wilson2010-08-052-24/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110292 91177308-0d34-0410-b5e6-96231b3b80d8
* Make x86-64 membarriers work without sse and clean up some of theEric Christopher2010-08-043-4/+14
| | | | | | | uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110274 91177308-0d34-0410-b5e6-96231b3b80d8
* and back in. false alarm on the tests from another unrelated local change.Jim Grosbach2010-08-041-2/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110269 91177308-0d34-0410-b5e6-96231b3b80d8
* PR7814: Truncates cannot be ignored for signed comparisons.Eli Friedman2010-08-041-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110268 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement target specific getDebugValueLocation().Devang Patel2010-08-041-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110267 91177308-0d34-0410-b5e6-96231b3b80d8
* oops. revert for a moment to clean up tests first.Jim Grosbach2010-08-041-7/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110259 91177308-0d34-0410-b5e6-96231b3b80d8
* Reserve a stack slot if the function adjusts the stack but doesn'tJim Grosbach2010-08-041-2/+7
| | | | | | | | | | | simplify the call frame pseudo instructions. In that situation, the calculations for estimating the stack size will be way off, leading to not having an emergency spill slot when we need one. It should be possible to be more precise about tracking the adjustment values, but not really necessary for correctness. Upcoming cleanups for PEI in general will render that moot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110258 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement target specific getDebugValueLocation().Devang Patel2010-08-041-0/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110256 91177308-0d34-0410-b5e6-96231b3b80d8
* Use indirect calls in PowerPC JIT.Edwin Török2010-08-043-10/+31
| | | | | | | | | | See PR5201. There is no way to know if direct calls will be within the allowed range for BL. Hence emit all calls as indirect when in JIT mode. Without this long-running applications will fail to JIT on PowerPC with a relocation failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110246 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove switch for disabling ARM tail calls. TheyDale Johannesen2010-08-041-9/+0
| | | | | | | | seem to be working correctly. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110226 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DEBUG message.Devang Patel2010-08-041-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110224 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable COFF writer on mingw32 and cygwin.Benjamin Kramer2010-08-041-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110200 91177308-0d34-0410-b5e6-96231b3b80d8
* Make SPU backend handle insertelement and Kalle Raiskila2010-08-043-2/+12
| | | | | | | store for "half vectors" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110198 91177308-0d34-0410-b5e6-96231b3b80d8
* Print an error message when someone tries -integrated-as on an unsupported ↵Benjamin Kramer2010-08-041-1/+7
| | | | | | | | | | | target. - The COFF backend doesn't support MingW/Cygwin at the moment, it'll report an error, but it's still much better than random assertions from the MachO backend. - We want to make ELF the default eventually, it's what the majority of targets use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110197 91177308-0d34-0410-b5e6-96231b3b80d8
* by Alexander Herz:Gabor Greif2010-08-041-0/+7
| | | | | | | | | | | | | "The CWriter::GetValueName() method does not check if a value as an alias and emits the alias name which will never be defined in the output .c file (so the output file fails to compile). This can happen if you have multiple inheritance with several destructors defined by clang (...D0Ev, ...D1Ev, ...D2Ev)." -- applied with minor tweaks. Thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110194 91177308-0d34-0410-b5e6-96231b3b80d8
* Combine NEON VABD (absolute difference) intrinsics with ADDs to make VABABob Wilson2010-08-041-0/+16
| | | | | | | (absolute difference with accumulate) intrinsics. Radar 8228576. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110170 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a win64 encoding problem, patch by Cameron Esfahani!Chris Lattner2010-08-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110164 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for getting & setting the FPSCR application register on ARM when ↵Nate Begeman2010-08-034-20/+39
| | | | | | | | | | VFP is enabled. Add support for using the FPSCR in conjunction with the vcvtr instruction, for controlling fp to int rounding. Add support for the FLT_ROUNDS_ node now that the FPSCR is exposed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110152 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: Change somme target library names:Oscar Fuentes2010-08-032-2/+2
| | | | | | | | | | | | XCore->XCoreGen PIC16->PIC16CodeGen After updating your working copy, the first build will fail because it is using the old library dependencies. Start the build again and it will work fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110127 91177308-0d34-0410-b5e6-96231b3b80d8
* More SPU v2f32 stuff added: insertelement and shuffle.Kalle Raiskila2010-08-022-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110038 91177308-0d34-0410-b5e6-96231b3b80d8
* Add preliminary v2f32 support for SPU. Like with v2i32, we justKalle Raiskila2010-08-024-69/+81
| | | | | | | | | duplicate the instructions and operate on half vectors. Also reorder code in SPUInstrInfo.td for better coherency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110037 91177308-0d34-0410-b5e6-96231b3b80d8
* Add preliminary v2i32 support for SPU backend. As there are noKalle Raiskila2010-08-024-6/+49
| | | | | | | | | | | such registers in SPU, this support boils down to "emulating" them by duplicating instructions on the general purpose registers. This adds the most basic operations on v2i32: passing parameters, addition, subtraction, multiplication and a few others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110035 91177308-0d34-0410-b5e6-96231b3b80d8
* PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR.Eli Friedman2010-08-021-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109998 91177308-0d34-0410-b5e6-96231b3b80d8
* PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actuallyEli Friedman2010-08-011-2/+2
| | | | | | | | improves the generated code in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109985 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence some -Asserts uninitialized variable warnings.Daniel Dunbar2010-07-311-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109956 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Remove HasAbsolutizedSet from WindowsX86AsmBackend.Michael J. Spencer2010-07-311-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109949 91177308-0d34-0410-b5e6-96231b3b80d8
* Move newlines before inline jumptables from the asm strings in .td files toBob Wilson2010-07-314-9/+9
| | | | | | | | the jtblock_operand print methods. This avoids extra newlines in the disassembler's output. PR7757. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109948 91177308-0d34-0410-b5e6-96231b3b80d8
* Add relax all support to the COFF object streamer.Michael J. Spencer2010-07-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109947 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for disassembling VMVN (immediate) instructions. PR7747.Bob Wilson2010-07-311-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109946 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -disable-shifter-op to disable isel of shifter ops. On Cortex-a9 the ↵Evan Cheng2010-07-301-0/+11
| | | | | | shifts cost extra instructions so it might be better to emit them separately to take advantage of dual-issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109934 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a check in the ARM disassembler for NEON instructions that wouldBob Wilson2010-07-301-5/+9
| | | | | | | | reference registers past the end of the NEON register file, and report them as invalid instead of asserting when trying to print them. PR7746. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109933 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC doesn't supported VLA with large alignment. This wasDale Johannesen2010-07-301-2/+2
| | | | | | | | | | formerly rejected by the FE, so asserted in the BE; now the FE only warns, so we treat it as a legitimate fatal error in PPC BE. This means the test for the feature won't pass, so it's xfail'd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109892 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the __TEXT,__StaticInit section to the list of sections emitted at theBob Wilson2010-07-301-0/+6
| | | | | | | | beginning on ARM Darwin assembly files so that it won't be placed after debug sections. Radar 8252813. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109879 91177308-0d34-0410-b5e6-96231b3b80d8
* Support all 128-bit AVX vector intrinsics. Most part of them I alreadyBruno Cardoso Lopes2010-07-303-232/+240
| | | | | | | | | | | | | declared during the addition of the assembler support, the additional changes are: - Add missing intrinsics - Move all SSE conversion instructions in X86InstInfo64.td to the SSE.td file. - Duplicate some patterns to AVX mode. - Step into PCMPEST/PCMPIST custom inserter and add AVX versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109878 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo!Bruno Cardoso Lopes2010-07-301-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109877 91177308-0d34-0410-b5e6-96231b3b80d8
* Many Thumb2 instructions can reference the full ARM register set (i.e.,Jim Grosbach2010-07-306-331/+465
| | | | | | | | | | | | | | | | | | | | | | | | | | | have 4 bits per register in the operand encoding), but have undefined behavior when the operand value is 13 or 15 (SP and PC, respectively). The trivial coalescer in linear scan sometimes will merge a copy from SP into a subsequent instruction which uses the copy, and if that instruction cannot legally reference SP, we get bad code such as: mls r0,r9,r0,sp instead of: mov r2, sp mls r0, r9, r0, r2 This patch adds a new register class for use by Thumb2 that excludes the problematic registers (SP and PC) and is used instead of GPR for those operands which cannot legally reference PC or SP. The trivial coalescer explicitly requires that the register class of the destination for the COPY instruction contain the source register for the COPY to be considered for coalescing. This prevents errant instructions like that above. PR7499 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109842 91177308-0d34-0410-b5e6-96231b3b80d8
* Add builtins for ssat/usat, similar to RealView's __ssat and __usat intrinsics.Nate Begeman2010-07-292-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109813 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor ARM-specific DAG combining in preparation for adding some moreBob Wilson2010-07-291-12/+25
| | | | | | | transformations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109800 91177308-0d34-0410-b5e6-96231b3b80d8
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