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* InstrItineraryData support on added.Bruno Cardoso Lopes2007-08-181-2/+8
* A Pass to insert Nops on intructions with DelaySlotBruno Cardoso Lopes2007-08-181-0/+77
* Mips generic fallback instruction schedule support!Bruno Cardoso Lopes2007-08-181-0/+63
* Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixedAnton Korobeynikov2007-08-153-14/+24
* add a note.Chris Lattner2007-08-151-0/+3
* Fix a typo pointd out by Maarten ter Huurne.Evan Cheng2007-08-131-1/+1
* When x86 addresses matching exceeds its recursion limit, check toDan Gohman2007-08-131-6/+12
* Fix PR1607Chris Lattner2007-08-131-3/+3
* expand a noteChris Lattner2007-08-111-3/+22
* With evan's explicit flag representation, hopefully we will finally beChris Lattner2007-08-111-1/+1
* 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.Bill Wendling2007-08-111-6/+21
* Use subregs to improve any_extend code generation when feasible.Christopher Lamb2007-08-102-16/+33
* Increase efficiency of sign_extend_inreg by using subregisters for truncation...Christopher Lamb2007-08-103-49/+89
* Edit README in light of previous LEA16 commit.Christopher Lamb2007-08-101-3/+1
* Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via sub...Christopher Lamb2007-08-101-10/+47
* propagate struct size and alignment of byval arguments to the DAGRafael Espindola2007-08-101-1/+6
* For kicks, I though it would be fun to use the correct opcode.Bill Wendling2007-08-101-31/+32
* Adding SSSE3 intrinsics.Bill Wendling2007-08-101-17/+284
* Temporarily backing out this change until we know why some dejagnu tests are ...Evan Cheng2007-08-091-3/+2
* divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the inst...Evan Cheng2007-08-092-4/+46
* GR16_ sub-register class should be GR8_, not GR8. That is, it should only be ...Evan Cheng2007-08-091-3/+4
* long double 9 of N. This finishes up the X86-32 bitsDale Johannesen2007-08-091-1/+13
* Fix arguments for some Altivec instructions. From SWB.Dale Johannesen2007-08-091-9/+15
* Fix spelling of mtvscr and mfvscr.Dale Johannesen2007-08-071-2/+2
* Long double patch 8 of N: make it partially work inDale Johannesen2007-08-073-100/+100
* Initial JIT support for ARM by Raul Fernandes Herbster.Evan Cheng2007-08-079-275/+889
* Long double patch 7 of N, unless I lost count:). Dale Johannesen2007-08-073-1/+37
* Replace 4-line function with 10-line version per review comment.Dale Johannesen2007-08-061-4/+10
* Move lengthy conditional down 1 level per review comment.Dale Johannesen2007-08-062-5/+6
* Get X86 long double calling convention to workDale Johannesen2007-08-064-3/+34
* Make 80-bit store maintain simulated FP stack correctly.Dale Johannesen2007-08-061-1/+2
* Fix minor doxygen nits.Reid Spencer2007-08-051-3/+3
* Long double patch 4 of N: initial x87 implementation.Dale Johannesen2007-08-058-6/+162
* This is the patch to provide clean intrinsic function overloading support in ...Chandler Carruth2007-08-041-2/+2
* Make x86 long double alignment 32 for everything butDale Johannesen2007-08-031-1/+3
* long double patch 2 of N. Handle it in TargetData.Dale Johannesen2007-08-036-7/+19
* add an observationChris Lattner2007-08-031-0/+27
* More explicit keywords.Dan Gohman2007-08-026-6/+6
* Fix the alignment requirements of several unpck and shuf instructions.Dan Gohman2007-08-022-13/+21
* Fix pastos in vector arithmetic intrinsics.Dan Gohman2007-08-021-4/+4
* Mark the SSE and MMX load instructions thatDan Gohman2007-08-022-0/+6
* Switch some multiplication instructions over to the new scheme for testing.Evan Cheng2007-08-022-12/+53
* Can't handle offset and scale if rip-relative addressing is to be used.Evan Cheng2007-08-011-6/+10
* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-011-4/+4
* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-014-1/+21
* Some out operands were incorrectly specified as input operands.Evan Cheng2007-08-012-17/+17
* Missing Requires.Evan Cheng2007-08-011-2/+2
* Be more precise.Evan Cheng2007-08-011-1/+1
* Change a .size directive to use a tab instead of a space, for consistency.Dan Gohman2007-08-011-1/+1
* Indexed loads each has 2 outputs.Evan Cheng2007-08-011-10/+10
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