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* Make the big switch: Change MCSectionMachO to represent a section *semantically*Chris Lattner2009-08-104-111/+168
| | | | | | | | | | | | | | | | | | instead of syntactically as a string. This means that it keeps track of the segment, section, flags, etc directly and asmprints them in the right format. This also includes parsing and validation support for llvm-mc and "attribute(section)", so we should now start getting errors about invalid section attributes from the compiler instead of the assembler on darwin. Still todo: 1) Uniquing of darwin mcsections 2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h] 3) there are a few FIXMEs, for example what is the syntax to get the S_GB_ZEROFILL segment type? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
* Use abs64 instead abs; some platforms don't have a 64-bit abs overload. ↵Benjamin Kramer2009-08-091-1/+1
| | | | | | Noticed by Yonggang Luo! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78543 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support to convert 32-bit instructions to 16-bit non-two-address ones.Evan Cheng2009-08-091-35/+96
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78540 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Implement user defined super classes.Daniel Dunbar2009-08-092-2/+27
| | | | | | | - We can now discriminate SUB32ri8 from SUB32ri, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend comment on ParserMatchClass .td field, and add some missingDaniel Dunbar2009-08-092-0/+4
| | | | | | | classes for X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78524 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Define match classes in the .td file.Daniel Dunbar2009-08-091-0/+3
| | | | | | | -2 FIXMEs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
* sink the 'name' and 'isdirective' state out of MCSection into its derived ↵Chris Lattner2009-08-084-53/+63
| | | | | | | | | classes. This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
* Use subclassing to print lane-like immediates (w/o hash) eliminatingAnton Korobeynikov2009-08-085-32/+37
| | | | | | 'no_hash' modifier. Hopefully this will make Daniel happy :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78514 91177308-0d34-0410-b5e6-96231b3b80d8
* add a note about dead zero extends.Chris Lattner2009-08-081-0/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78511 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Make MCSection an abstract class.Chris Lattner2009-08-086-106/+10
| | | | | | | | | | | 2. Move section switch printing to MCSection virtual method which takes a TAI. This eliminates textual formatting stuff from TLOF. 3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and TLOFELF::AtIsCommentChar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78510 91177308-0d34-0410-b5e6-96231b3b80d8
* Add crc32 instruction and intrinsics. Add a new class of prefixEric Christopher2009-08-085-0/+93
| | | | | | | | | | bytes for F2 0F 38 and propagate. Add a FIXME for a set of possibilities which correspond to intrinsics already used. New test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for READCYCLECOUNTER in Blackfin back-end.Jakob Stoklund Olesen2009-08-083-0/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
* add new PIC16Section class, this time hopefully not breaking the build :)Chris Lattner2009-08-083-2/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78505 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.Daniel Dunbar2009-08-081-2/+6
| | | | | | | | Also, redefined MatchRegisterName to just return the register value or a sentinel, to simplify the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r78501, it doesn't build.Daniel Dunbar2009-08-082-37/+1
| | | | | | | | | --- Reverse-merging r78501 into '.': U lib/Target/PIC16/PIC16TargetObjectFile.cpp D lib/Target/PIC16/PIC16Section.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78503 91177308-0d34-0410-b5e6-96231b3b80d8
* make PIC16 create its own custom MCSection.Chris Lattner2009-08-082-1/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
* make target-specific TLOF impls (except PIC16) create target-specificChris Lattner2009-08-081-3/+3
| | | | | | | MCSection instances. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.Chris Lattner2009-08-084-30/+27
| | | | | | | | | A TAI hook is appropriate in this case because this is just an asm syntax issue, not a semantic difference. TLOF should model the semantics of the section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
* give pic16 a target-specific section creation name tooChris Lattner2009-08-082-35/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
* now that getOrCreateSection is all object-file specific,Chris Lattner2009-08-083-152/+133
| | | | | | | | give the impls an object-file-specific name. In the future they can take different arguments etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
* sink getOrCreateSection down into all the object file implementations,Chris Lattner2009-08-083-8/+34
| | | | | | | now that they create *all* the sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
* Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 ↵Bruno Cardoso Lopes2009-08-081-2/+2
| | | | | | | | | | instructions, since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since it handles both word absolute relocations in the same way git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMakeDaniel Dunbar2009-08-081-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
* Add insert_elt / extract_elt patterns for v4f32 stuff.Anton Korobeynikov2009-08-081-19/+30
| | | | | | Did anyone tests v4f32 ever? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
* Lane number should be printed w/o hashAnton Korobeynikov2009-08-082-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
* Use VLDM / VSTM to spill/reload 128-bit Neon registersAnton Korobeynikov2009-08-085-10/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
* move this fp select into a patternAndrew Lenharth2009-08-082-22/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Improve match code.Daniel Dunbar2009-08-081-23/+1
| | | | | | | | | | | | | | | - This doesn't actually improve the algorithm (its still linear), but the generated (match) code is now fairly compact and table driven. Still need a generic string matcher. - The table still needs to be compressed, this is quite simple to do and should shrink it to under 16k. - This also simplifies and restructures the code to make the match classes more explicit, in anticipation of resolving ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,Bob Wilson2009-08-082-16/+70
| | | | | | | so I generalized the class for VTRN in the .td file to handle all 3 of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Neon VTRN instructions. For now, anyway, these are selectedBob Wilson2009-08-082-0/+48
| | | | | | | | | directly from the intrinsics produced by the frontend. If it is more convenient to have a custom DAG node for using these to implement shuffles, we can add that later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng2009-08-082-1/+219
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
* Code refactoring. No functionality change.Evan Cheng2009-08-084-22/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
* tADDhirr should target GPR, not tGPR.Evan Cheng2009-08-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
* I can type.Evan Cheng2009-08-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
* make printInstruction return void since its result is omitted. Make the Chris Lattner2009-08-0813-14/+14
| | | | | | | error condition get trapped with an assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
* don't check the result of printInstruction anymore.Chris Lattner2009-08-085-19/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78444 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not generate 32-bit call on win64 when imm does not fitAnton Korobeynikov2009-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
* Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a bunch of now-dead crud from the asmprinter and TAI interfaces.Chris Lattner2009-08-071-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78428 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the stuffAnton Korobeynikov2009-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78425 91177308-0d34-0410-b5e6-96231b3b80d8
* avoid this libcall with long inline expansionAndrew Lenharth2009-08-071-1/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78420 91177308-0d34-0410-b5e6-96231b3b80d8
* 2 more vdup.32 casesAnton Korobeynikov2009-08-072-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
* A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR.Evan Cheng2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78418 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement.Bill Wendling2009-08-071-45/+78
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78411 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.Evan Cheng2009-08-072-3/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Tweaks in response to feedback.Daniel Dunbar2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
* This is done.Evan Cheng2009-08-071-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78399 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode.Evan Cheng2009-08-072-8/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78398 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix support to use NEON for single precision fp math.Evan Cheng2009-08-072-46/+90
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78397 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor fixes to avoid using invalid debugloc.Sanjiv Gupta2009-08-071-5/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78383 91177308-0d34-0410-b5e6-96231b3b80d8
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