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* Mark some more instructions as CodeGenOnly. Remove filters from the disassemb...Craig Topper2013-10-121-17/+19
* For Mips16, start to consolidate all forms of 32 bit literal loading so thatReed Kotler2013-10-121-3/+1
* Add missing #include's to cctype when using isdigit/alpha/etc.Will Dietz2013-10-122-0/+3
* Fix typoMatt Arsenault2013-10-111-1/+1
* Mips: Disassemble sign-extended 64 bit immediates properly.Benjamin Kramer2013-10-111-1/+3
* [ARM] Fix FP ABI attributes with no VFP enabled.Amara Emerson2013-10-111-14/+12
* This reverts 192447 because of compiler warning generated on darwin build.Matheus Almeida2013-10-113-174/+14
* This reverts r192449 because of compiler warning generated on darwin build.Matheus Almeida2013-10-112-109/+31
* [mips][msa] Direct Object Emission for the majority of the ELM instructions.Matheus Almeida2013-10-112-31/+109
* [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.Matheus Almeida2013-10-113-14/+174
* [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMach...Justin Holewinski2013-10-111-2/+22
* Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom ...Justin Holewinski2013-10-112-15/+36
* [mips][msa] Added support for matching maddv.[bhwd], and msubv.[bhwd] from no...Daniel Sanders2013-10-112-16/+33
* [mips][msa] Added support for matching fmsub.[wd] from normal IR (i.e. not in...Daniel Sanders2013-10-112-4/+11
* XCore target fix bug in emitArrayBound() causing segmentation faultRobert Lytton2013-10-111-6/+5
* XCore target does not emit '.hidden' or '.protected' attributesRobert Lytton2013-10-111-0/+4
* XCore target: fix bug in XCoreLowerThreadLocal.cppRobert Lytton2013-10-111-10/+21
* XCore target: add XCoreTargetLowering::isZExtFree()Robert Lytton2013-10-112-0/+22
* [mips][msa] Added support for matching fmadd.[wd] from normal IR (i.e. not in...Daniel Sanders2013-10-112-4/+7
* [mips][msa] Added support for matching ffint_[us].[wd], and ftrunc_[us].[wd] ...Daniel Sanders2013-10-112-12/+31
* Implement aarch64 neon instruction set AdvSIMD (copy).Kevin Qin2013-10-113-56/+464
* Fix typoMatt Arsenault2013-10-101-2/+2
* R600: Fix trunc i64 to i32 on SIMatt Arsenault2013-10-101-0/+5
* R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*Tom Stellard2013-10-105-4/+142
* R600/SI: Define a separate MIMG instruction for each possible output value typeTom Stellard2013-10-105-35/+90
* R600/SI: Mark the EXEC register as reservedTom Stellard2013-10-101-0/+1
* R600: Use StructurizeCFGPass for non SI targetsTom Stellard2013-10-106-2/+18
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-1011-2/+914
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-1011-895/+2
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-1011-2/+895
* ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline.Benjamin Kramer2013-10-101-2/+4
* ARM: correct liveness flags during ARMLoadStoreOptTim Northover2013-10-101-0/+77
* Allow non-AVX form of pmovmskb to take a GR64 operand.Craig Topper2013-10-101-0/+2
* Remove duplicate instructions.Craig Topper2013-10-101-16/+0
* [mips] Do not generate INS/EXT nodes if target does not have support forAkira Hatanaka2013-10-092-14/+19
* Revert "llvm-c: Make target initializer functions external functions in lib."Rui Ueyama2013-10-092-44/+0
* llvm-c: Make target initializer functions external functions in lib.Anders Waldenborg2013-10-092-0/+44
* Flip the ownership of MCStreamer and MCTargetStreamer.Benjamin Kramer2013-10-091-1/+1
* [Sparc] Disable tail call optimization for sparc64.Venkatraman Govindaraju2013-10-091-0/+3
* AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.Elena Demikhovsky2013-10-093-36/+92
* AArch64: enable MISched by default.Tim Northover2013-10-091-0/+4
* Add missing HasAVX512 predicate.Andrew Trick2013-10-091-2/+2
* Replace a couple instructions with patterns referring to other instructions w...Craig Topper2013-10-091-16/+11
* Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefi...Craig Topper2013-10-091-4/+4
* Mark some instructions as CodeGenOnly since they aren't needed by the assembl...Craig Topper2013-10-091-65/+73
* Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...Craig Topper2013-10-093-8/+12
* [AArch64] Add support for NEON scalar floating-point reciprocal estimate,Chad Rosier2013-10-081-10/+34
* [AArch64] Add support for NEON scalar signed/unsigned integer to floating-pointChad Rosier2013-10-082-0/+52
* Add fabsf to the list of inlined functions; otherwiseReed Kotler2013-10-081-0/+1
* [mips] Simplify and optimize code.Akira Hatanaka2013-10-082-11/+7
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