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* code cleanupChris Lattner2005-09-091-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23297 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the code generator that rlwimi is commutable if the rotate amountChris Lattner2005-09-093-1/+38
| | | | | | | | | is zero. This lets the register allocator elide some copies in some cases. This implements CodeGen/PowerPC/rlwimi-commute.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23292 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce two new concepts:Chris Lattner2005-09-091-11/+75
| | | | | | | | | | | | | | | 1. Add support for defining Pattern's, which can match expressions when there is no instruction that directly implements something. Instructions usually implicitly define patterns. 2. Add support for defining SDNodeXForm's, which are node transformations. This seperates the concept of a node xform out from the existing predicate support. Using this new stuff, we add a few instruction patterns, one for testing, and two for OR/XOR by an arbitrary immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23286 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespace/comment changes, no functionality diffsChris Lattner2005-09-081-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23283 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a bunch of stuff needed for node type inference. Move 'BLR' down withChris Lattner2005-09-081-21/+114
| | | | | | | | the rest of the instructions, add comment markers to seperate portions of the file into logical parts git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23277 91177308-0d34-0410-b5e6-96231b3b80d8
* add patterns for x?oris?Chris Lattner2005-09-082-8/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23268 91177308-0d34-0410-b5e6-96231b3b80d8
* add patterns to the addi/addis/mulli etc instructions. Define predicatesChris Lattner2005-09-082-16/+52
| | | | | | | for matching signed 16-bit and shifted 16-bit ppc immediates git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23267 91177308-0d34-0410-b5e6-96231b3b80d8
* Add patterns for some new instructions, allowing the use of the ineg fragment.Chris Lattner2005-09-082-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23266 91177308-0d34-0410-b5e6-96231b3b80d8
* ignore generated filesChris Lattner2005-09-074-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23263 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some cases handled by the generated portion of the iselChris Lattner2005-09-071-13/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23262 91177308-0d34-0410-b5e6-96231b3b80d8
* On non-apple systems, when using -march=ppc32, do not print:Chris Lattner2005-09-071-1/+1
| | | | | | | | | '' is not a recognized processor for this target (ignoring processor) Default to "generic" instead of "" for the default CPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23257 91177308-0d34-0410-b5e6-96231b3b80d8
* Print:Chris Lattner2005-09-071-4/+4
| | | | | | | | | | | '' is not a recognized processor for this target (ignoring processor) instead of: is not a recognized processor for this target (ignoring processor) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23256 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when weNate Begeman2005-09-064-13/+69
| | | | | | | | | | are allowed to generate 64-bit-only PowerPC instructions for 32 bit hosts, such as the PowerPC 970. This speeds up 189.lucas from 81.99 to 32.64 seconds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23250 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up the AssertXext problem, as well as adding it at callsAndrew Lenharth2005-09-062-14/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23246 91177308-0d34-0410-b5e6-96231b3b80d8
* Add note about future optimization noted in the ppc compiler writer's guideNate Begeman2005-09-061-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23245 91177308-0d34-0410-b5e6-96231b3b80d8
* Add accessor for 64bit flag, so that we can tell when it is safe toNate Begeman2005-09-062-1/+3
| | | | | | | generate the fun in-register fp<->long instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244 91177308-0d34-0410-b5e6-96231b3b80d8
* revert part of the last change, should fix regressionsAndrew Lenharth2005-09-042-6/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23241 91177308-0d34-0410-b5e6-96231b3b80d8
* explicitly specify an operands list for patterns with inputs (e.g. neg)Chris Lattner2005-09-031-8/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23240 91177308-0d34-0410-b5e6-96231b3b80d8
* include the dag isel fragmentChris Lattner2005-09-031-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23239 91177308-0d34-0410-b5e6-96231b3b80d8
* ask for a dag iselChris Lattner2005-09-031-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23238 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the isel to not break out of the big giant switch. Instead, theChris Lattner2005-09-031-59/+61
| | | | | | | switch should never be exited, so its bottom is now unreachable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23234 91177308-0d34-0410-b5e6-96231b3b80d8
* rearrange logical ops to group them together more consistently.Chris Lattner2005-09-031-16/+42
| | | | | | | | | Define the PatFrag class which can be used to define subpatterns to match things with. Define 'not', and use it to define the patterns for andc, nand, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23233 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AND/OR/XORChris Lattner2005-09-022-31/+65
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23232 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some initial patterns to simple binary instructions, though theyChris Lattner2005-09-022-25/+43
| | | | | | | | | | currently don't do anything. This elides patterns for binary operators that ping on the carry flag, since we don't model it yet. This patch also removes PPC::SUB, because it is dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23230 91177308-0d34-0410-b5e6-96231b3b80d8
* turn on dag isel by defaultChris Lattner2005-09-021-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23226 91177308-0d34-0410-b5e6-96231b3b80d8
* Add help support for -mcpu and -mattr.Jim Laskey2005-09-022-21/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23222 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull out Lowering in preperation for multiple ISels. Oh, and get rid of ↵Andrew Lenharth2005-09-023-434/+435
| | | | | | some stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23220 91177308-0d34-0410-b5e6-96231b3b80d8
* Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.Chris Lattner2005-09-023-8/+8
| | | | | | | Remove the -enable-gpopt option which is subsumed by feature flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23218 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix VC++ build errorsJeff Cohen2005-09-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23210 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore this patch now that the latent bug has been fixedChris Lattner2005-09-021-2/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23209 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert the previous patch which causes a mysterious regression in toast.Chris Lattner2005-09-021-16/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23207 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle any_extend like zextChris Lattner2005-09-021-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23202 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle ANY_EXTEND like ZERO_EXTEND. Simplify the extend/truncate code onChris Lattner2005-09-021-59/+23
| | | | | | | the observation that it only has to handle i1 -> i64 and i64 -> i1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23201 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement small-arguments.ll:test3 by teaching the DAG optimizer thatChris Lattner2005-09-011-2/+16
| | | | | | | | the results of calls to functions returning small values are properly sign/zero extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23198 91177308-0d34-0410-b5e6-96231b3b80d8
* Align functions to 16-byte boundaries, to eliminate noise in performance ↵Chris Lattner2005-09-011-1/+1
| | | | | | | | | measurements. This improves the performance of 'treeadd' by about 20% with the dag isel, restoring it to the pattern-isel level (which happens to get the alignment right). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23194 91177308-0d34-0410-b5e6-96231b3b80d8
* Local labels on darwin apparently start with just 'L', not .L like otherChris Lattner2005-09-011-2/+2
| | | | | | | | platforms. This reduces executable size and makes shark realize the actual bounds of functions instead of showing each MBB as a function :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23193 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-0123-35/+132
| | | | | | | | | 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
* This new class provides support for platform specific "features". The intentJim Laskey2005-09-011-0/+173
| | | | | | | | is to manage processor specific attributes from the command line. See examples of use in llc/lli and PowerPCTargetSubtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23191 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement dynamic allocas correctly. In particular, because we were copyingChris Lattner2005-09-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | directly out of R1 (without using a CopyFromReg, which uses a chain), multiple allocas were getting CSE'd together, producing bogus code. For this: int %foo(bool %X, int %A, int %B) { br bool %X, label %T, label %F F: %G = alloca int %H = alloca int store int %A, int* %G store int %B, int* %H %R = load int* %G ret int %R T: ret int 0 } We were generating: _foo: stwu r1, -16(r1) stw r31, 4(r1) or r31, r1, r1 stw r1, 12(r31) cmpwi cr0, r3, 0 bne cr0, .LBB_foo_2 ; T .LBB_foo_1: ; F li r2, 16 subf r2, r2, r1 ;; One alloca or r1, r2, r2 or r3, r1, r1 or r1, r2, r2 or r2, r1, r1 stw r4, 0(r3) stw r5, 0(r2) lwz r3, 0(r3) lwz r1, 12(r31) lwz r31, 4(r31) lwz r1, 0(r1) blr .LBB_foo_2: ; T li r3, 0 lwz r1, 12(r31) lwz r31, 4(r31) lwz r1, 0(r1) blr Now we generate: _foo: stwu r1, -16(r1) stw r31, 4(r1) or r31, r1, r1 stw r1, 12(r31) cmpwi cr0, r3, 0 bne cr0, .LBB_foo_2 ; T .LBB_foo_1: ; F or r2, r1, r1 li r3, 16 subf r2, r3, r2 ;; Alloca 1 or r1, r2, r2 or r2, r1, r1 or r6, r1, r1 subf r3, r3, r6 ;; Alloca 2 or r1, r3, r3 or r3, r1, r1 stw r4, 0(r2) stw r5, 0(r3) lwz r3, 0(r2) lwz r1, 12(r31) lwz r31, 4(r31) lwz r1, 0(r1) blr .LBB_foo_2: ; T li r3, 0 lwz r1, 12(r31) lwz r31, 4(r31) lwz r1, 0(r1) blr This fixes Povray and SPASS with the dag isel, the last two failing cases. Tommorow we will hopefully turn it on by default! :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23190 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug where we were useing HA to get the high part, which seems like itChris Lattner2005-09-011-11/+10
| | | | | | | | | | | could cause a miscompile. Fixing this didn't fix the two programs that fail though. :( This also changes the implementation to follow the pattern selector more closely, causing us to select 0 to li instead of lis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23189 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not select the operands being passed into SelectCC. IT does this itselfChris Lattner2005-09-011-4/+2
| | | | | | | and selecting early prevents folding immediates into the cmpw* instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23188 91177308-0d34-0410-b5e6-96231b3b80d8
* Move FCTIWZ handling out of the instruction selectors and into legalization,Chris Lattner2005-08-314-64/+70
| | | | | | | getting them out of the business of making stack slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23180 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead codeChris Lattner2005-08-312-75/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23179 91177308-0d34-0410-b5e6-96231b3b80d8
* Move SHL,SHR i64 -> legalizerChris Lattner2005-08-311-2/+57
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23178 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove code that is now dead from the pattern isel.Chris Lattner2005-08-311-28/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23177 91177308-0d34-0410-b5e6-96231b3b80d8
* lower sra_parts on the dag, implementing it for the dag isel, and exposingChris Lattner2005-08-311-0/+28
| | | | | | | the ops to dag optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23176 91177308-0d34-0410-b5e6-96231b3b80d8
* add assert zext/sext to the dag iselChris Lattner2005-08-311-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23171 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle AssertSext/AssertZext nodes, fixing the regressions last night.Chris Lattner2005-08-311-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23170 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable generation of AssertSext and AssertZext in the PPC backend.Nate Begeman2005-08-311-2/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23168 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 'ret long' to return the high and lo parts in the right registers. ThisChris Lattner2005-08-311-9/+7
| | | | | | | fixes crafty and probably others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23167 91177308-0d34-0410-b5e6-96231b3b80d8
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