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* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-076-11/+36
* Add more assembly opcodes for SSE compare instructionsBruno Cardoso Lopes2010-07-071-8/+32
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument f...Evan Cheng2010-07-076-9/+9
* Print undefined/unknown debug value as "undef".Devang Patel2010-07-071-1/+6
* grammar and trailing whitespaceJim Grosbach2010-07-071-6/+6
* Allow copies between GR8_ABCD_L and GR8_ABCD_H.Jakob Stoklund Olesen2010-07-071-0/+3
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-22/+42
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-075-12/+78
* Add AVX AES instructionsBruno Cardoso Lopes2010-07-071-26/+70
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-071-57/+95
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-073-71/+19
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-0726-53/+125
* Add AVX SSE4.2 instructionsBruno Cardoso Lopes2010-07-071-114/+179
* Use only one multiclass to pinsrq instructionsBruno Cardoso Lopes2010-07-072-38/+20
* Now that almost all SSE4.1 AVX instructions are added, move code around to mo...Bruno Cardoso Lopes2010-07-072-361/+374
* Add AVX SSE4.1 insertps, ptest and movntdqa instructionsBruno Cardoso Lopes2010-07-071-18/+39
* Add AVX SSE4.1 extractps and pinsr instructionsBruno Cardoso Lopes2010-07-071-35/+67
* Also use REG_SEQUENCE for VTBX instructions.Bob Wilson2010-07-072-24/+30
* Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's whereJim Grosbach2010-07-071-2/+4
* Add AVX SSE4.1 Extract Integer instructionsBruno Cardoso Lopes2010-07-071-0/+11
* By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing ratherJim Grosbach2010-07-061-0/+2
* Use REG_SEQUENCE nodes to make the table registers for VTBL instructions beBob Wilson2010-07-062-10/+61
* Accept RIP-relative symbols with 'i' constraint, andDale Johannesen2010-07-062-2/+3
* Track defs for all aliases in NEONMoveFix.Jakob Stoklund Olesen2010-07-061-2/+2
* Add the rest of AVX SSE4.1 packed move with sign/zero extend instructionsBruno Cardoso Lopes2010-07-061-0/+17
* Add part of AVX SSE4.1 packed move with sign/zero extend instructionsBruno Cardoso Lopes2010-07-061-0/+15
* Fix comment from previous patchBruno Cardoso Lopes2010-07-061-1/+1
* Add AVX vblendvpd, vblendvps and vpblendvb instructionsBruno Cardoso Lopes2010-07-064-10/+61
* CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman2010-07-064-6/+6
* Propagate debug loc.Devang Patel2010-07-0615-42/+50
* Represent NEON load/store alignments in bytes, not bits.Bob Wilson2010-07-063-7/+13
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-0612-205/+245
* Fix PR7545 crash.Devang Patel2010-07-061-3/+3
* Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversionRafael Espindola2010-07-061-4/+6
* Revert r107655.Dan Gohman2010-07-0612-244/+204
* Make getMinimalPhysRegClass' comment mention what makes it differentDan Gohman2010-07-061-1/+2
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-0612-204/+244
* Fix up -fstack-protector on linux to use the segmentEric Christopher2010-07-062-0/+27
* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-053-64/+38
* Remove some unused/redundant code.Kalle Raiskila2010-07-052-20/+0
* more tidying.Chris Lattner2010-07-051-2/+1
* some notes about suboptimal insertps'sChris Lattner2010-07-051-0/+31
* rip out even more sporadic v2f32 support.Chris Lattner2010-07-053-19/+1
* rip out the various v2f32 "mmx" handling logic, now that Chris Lattner2010-07-051-6/+6
* Just rip v2f32 support completely out of the X86 backend. InChris Lattner2010-07-041-23/+4
* fix PR7518 - terrible codegen of <2 x float>, by only markingChris Lattner2010-07-041-6/+16
* indentationChris Lattner2010-07-041-2/+3
* Revert r107583. I no longer think that this is the way to solve the problem.Bill Wendling2010-07-041-2/+2
* Mark sse_load_f32 and sse_load_f64 as having memory operandsBill Wendling2010-07-041-2/+2
* Minor amendment to switch-lowering improvement.Eli Friedman2010-07-031-2/+10
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