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* Implement a vectorized algorithm for <16 x i8> << <16 x i8>Nate Begeman2010-07-281-21/+73
* ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller ...Nate Begeman2010-07-272-0/+34
* Make MC use Windows COFF on Windows and add tests.Michael J. Spencer2010-07-272-0/+23
* The isLoadFromStackSlot and isStoreToStackSlot have no way of reportingJakob Stoklund Olesen2010-07-271-2/+3
* Add assertions that expose the PR7713 miscompilation: Accessing a stack slotJakob Stoklund Olesen2010-07-271-0/+4
* And a bit more non-ASCII stuff.Eli Friedman2010-07-261-1/+1
* Drop some non-ascii stuffAnton Korobeynikov2010-07-261-7/+7
* On x86, f32 / f64 nodes share the same registers as 128-bit vector values.Evan Cheng2010-07-262-0/+30
* Add a noteAnton Korobeynikov2010-07-261-0/+21
* Temporary hack to let codegen assert or generate poor code in caseBruno Cardoso Lopes2010-07-261-8/+13
* Currently EH lowering code expects typeinfo to be global only.Anton Korobeynikov2010-07-261-2/+11
* ARM fastisel isn't ready.Evan Cheng2010-07-261-1/+2
* Remove extraneous semicolonDouglas Gregor2010-07-251-1/+1
* Unbreak CMake buildDouglas Gregor2010-07-251-0/+1
* Hook in GlobalMerge passAnton Korobeynikov2010-07-246-1/+222
* Add an ILP scheduler. This is a register pressure aware scheduler that'sEvan Cheng2010-07-242-0/+21
* Support x86 "eiz" and "riz" pseudo index registers in the assembler.Bruno Cardoso Lopes2010-07-243-1/+25
* Use the appropriate register class for an i32 when adding ARM::LR to theJim Grosbach2010-07-231-1/+1
* Revert 109076. It is wrong and was causing regressions. Add someDale Johannesen2010-07-231-18/+48
* - Allow target to specify when is register pressure "too high". In most cases,Evan Cheng2010-07-232-0/+24
* Remove trailing whitespaceBruno Cardoso Lopes2010-07-231-30/+30
* Add AVX version of CLMUL instructionsBruno Cardoso Lopes2010-07-233-0/+58
* fix constness warningsGabor Greif2010-07-232-2/+4
* do not (implicitly) dereference iterator many times, cache it insteadGabor Greif2010-07-231-2/+3
* Declare CLMUL as a subtarget featureBruno Cardoso Lopes2010-07-231-0/+2
* Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes2010-07-233-3/+10
* Add complete assembler support for FMA3 instructions, with descriptions and e...Bruno Cardoso Lopes2010-07-233-0/+72
* The only supported calling convention for X86-64 usesDale Johannesen2010-07-231-1/+14
* Fix some AVX instructions which didnt had HasAVX prefix. And also a problem w...Bruno Cardoso Lopes2010-07-231-6/+8
* eliminate the TargetInstrInfo::GetInstSizeInBytes hook. Chris Lattner2010-07-224-5/+5
* Add remaining AVX instructions (most of them dealing with GR64 destinations. ...Bruno Cardoso Lopes2010-07-221-5/+30
* remove the JIT "NeedsExactSize" feature and supporting logic.Chris Lattner2010-07-222-9/+0
* switch a private implementation of GetFunctionSizeInBytes.Chris Lattner2010-07-221-1/+14
* X86MCInstLower now depends on AsmPrinter being around.Chris Lattner2010-07-222-32/+11
* instead of migrating it to the MC instruction encoder, justChris Lattner2010-07-223-553/+100
* ARMv4 JIT forgets to set the lr register when making a indirect function call...Xerxes Ranby2010-07-222-1/+14
* undo 80 column trespassing I causedGabor Greif2010-07-221-1/+2
* Mark an assert-only variable as used.Chandler Carruth2010-07-221-0/+1
* Fix the generated file name for CMake.Chandler Carruth2010-07-221-1/+1
* Attempt to fix linking issues with CMake. Please review other CMake users,Chandler Carruth2010-07-222-2/+2
* Update CMake files.Owen Anderson2010-07-221-0/+1
* Custom lower the memory barrier instructions and add supportEric Christopher2010-07-225-18/+75
* Fix constant island pass's handling of tBR_JTr. The offset of the instruction...Evan Cheng2010-07-221-2/+10
* 80-columns.Eric Christopher2010-07-221-9/+12
* Make fast isel win64-aware w.r.t. call-clobbered regsNate Begeman2010-07-221-3/+14
* More register pressure aware scheduling work.Evan Cheng2010-07-211-14/+11
* Add more 256-bit forms for a bunch of regular AVX instructionsBruno Cardoso Lopes2010-07-212-76/+160
* Fixes win64. It was broken by a previous patch where I missed the !isWin64Rafael Espindola2010-07-211-4/+8
* For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumbJim Grosbach2010-07-211-0/+17
* add some rough support for making mcinst lowering work without anChris Lattner2010-07-211-5/+23
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