| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Pass CCState by reference. | Akira Hatanaka | 2012-01-24 | 1 | -1/+1 |
| * | Pattern for f32 to i64 conversion. | Akira Hatanaka | 2012-01-24 | 1 | -0/+1 |
| * | Intel Syntax: Extend special hand coded logic, to recognize special instructi... | Devang Patel | 2012-01-24 | 1 | -5/+15 |
| * | 64-bit sign extension in register instructions. | Akira Hatanaka | 2012-01-24 | 2 | -5/+10 |
| * | NEON VST4(one lane) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 2 | -0/+148 |
| * | Widen the instruction encoder that TblGen emits to a 64 bits, which should ac... | Owen Anderson | 2012-01-24 | 7 | -7/+7 |
| * | NEON VLD4(one lane) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 2 | -0/+245 |
| * | NEON Two-operand assembly aliases for VSRA. | Jim Grosbach | 2012-01-24 | 1 | -0/+39 |
| * | NEON Two-operand assembly aliases for VSLI. | Jim Grosbach | 2012-01-24 | 1 | -0/+19 |
| * | NEON Two-operand assembly aliases for VSRI. | Jim Grosbach | 2012-01-24 | 1 | -0/+19 |
| * | NEON add correct predicates for some asm aliases. | Jim Grosbach | 2012-01-24 | 2 | -18/+27 |
| * | C++, CBE, and TLOF support for ConstantDataSequential | Chris Lattner | 2012-01-24 | 3 | -19/+123 |
| * | ZERO_EXTEND operation is optimized for AVX. | Elena Demikhovsky | 2012-01-24 | 1 | -2/+37 |
| * | Use correct register class for am2offset register operands. | Anton Korobeynikov | 2012-01-24 | 1 | -2/+2 |
| * | Add comments near load pattern fragments indicating that all integer vector l... | Craig Topper | 2012-01-24 | 1 | -0/+6 |
| * | NEON VST4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2012-01-24 | 2 | -0/+157 |
| * | NEON VLD4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2012-01-24 | 4 | -0/+179 |
| * | Tidy up. Remove some vertical space for readability. | Jim Grosbach | 2012-01-24 | 1 | -344/+121 |
| * | Revert r148686 (and r148694, a fix to it) due to a serious layering | Chandler Carruth | 2012-01-24 | 2 | -5/+7 |
| * | Fix typo. | Jim Grosbach | 2012-01-24 | 1 | -2/+2 |
| * | NEON VST3(single element from one lane) assembly parsing. | Jim Grosbach | 2012-01-24 | 2 | -0/+176 |
| * | Fix typo. | Devang Patel | 2012-01-23 | 1 | -1/+1 |
| * | NEON VST3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2012-01-23 | 2 | -20/+206 |
| * | NEON VLD3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2012-01-23 | 4 | -6/+220 |
| * | Add missed mayStore flag to STREXD / t2STREXD | Anton Korobeynikov | 2012-01-23 | 2 | -6/+5 |
| * | Intel syntax: Robustify parsing of memory operand's displacement experssion. | Devang Patel | 2012-01-23 | 1 | -2/+7 |
| * | NEON VLD3 lane-indexed assembly parsing and encoding. | Jim Grosbach | 2012-01-23 | 2 | -0/+267 |
| * | Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] | Devang Patel | 2012-01-23 | 1 | -6/+16 |
| * | Simplify some NEON assembly pseudo definitions. | Jim Grosbach | 2012-01-23 | 3 | -396/+177 |
| * | Intel syntax: Parse segment registers. | Devang Patel | 2012-01-23 | 1 | -4/+16 |
| * | ARMAsmPrinter.cpp: Try to fix up r148686. EnableARMEHABI was also here. | NAKAMURA Takumi | 2012-01-23 | 1 | -2/+3 |
| * | Custom lower PCMPEQ/PCMPGT intrinsics to target specific nodes and remove the... | Craig Topper | 2012-01-23 | 2 | -301/+165 |
| * | An option to selectively enable parts of ARM EHABI support. | Evgeniy Stepanov | 2012-01-23 | 1 | -5/+2 |
| * | Update more places to use target specific nodes for vector shifts instead of ... | Craig Topper | 2012-01-23 | 1 | -42/+19 |
| * | Custom lower vector shift intrinsics to target specific nodes and remove the ... | Craig Topper | 2012-01-23 | 2 | -385/+156 |
| * | Remove pattern fragments for v32i8, v16i16, v8i32, v16i8, v8i16, and v4i32 lo... | Craig Topper | 2012-01-23 | 2 | -30/+2 |
| * | Combine X86 CMPPD and CMPPS node types. Simplifies selection code and pattern... | Craig Topper | 2012-01-22 | 4 | -25/+26 |
| * | Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ X86... | Craig Topper | 2012-01-22 | 4 | -87/+66 |
| * | Use Attributes::None instead of 0 after r148553 change on Attributes from uns... | Nicolas Geoffray | 2012-01-22 | 1 | -1/+1 |
| * | Add target specific ISD node types for SSE/AVX vector shuffle instructions an... | Craig Topper | 2012-01-22 | 4 | -273/+410 |
| * | Add fused multiple+add instructions from VFPv4. | Anton Korobeynikov | 2012-01-22 | 8 | -27/+186 |
| * | Make code a little less verbose. | Craig Topper | 2012-01-22 | 1 | -7/+5 |
| * | Remove unused X86 ISD node type defines. | Craig Topper | 2012-01-22 | 2 | -8/+0 |
| * | Move some vector shift patterns into their instruction definitions. | Craig Topper | 2012-01-22 | 1 | -48/+42 |
| * | Add memory patterns for some of the fp<->integer conversion instructions. Fol... | Craig Topper | 2012-01-21 | 1 | -24/+28 |
| * | Remove unused variables. | Benjamin Kramer | 2012-01-21 | 1 | -2/+0 |
| * | Fix PR11819 introduced by r148537. I'd commit the test case, but the generate... | Craig Topper | 2012-01-21 | 1 | -2/+2 |
| * | Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction. | Jim Grosbach | 2012-01-21 | 2 | -1/+6 |
| * | Intel syntax: Robustify register parsing. | Devang Patel | 2012-01-20 | 1 | -28/+16 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 56 | -299/+139 |
