aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target
Commit message (Collapse)AuthorAgeFilesLines
* remove trailing whitespaceJim Grosbach2010-10-061-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115860 91177308-0d34-0410-b5e6-96231b3b80d8
* First in a sequence of ARM/MC/*ELF* specific work.Jason W Kim2010-10-062-39/+60
| | | | | | | | | | | Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute() Added ARMAsmPrinter::emitAttributes() (plural s). TODO: .cpu attribute needs to be refactored git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115859 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.Jim Grosbach2010-10-063-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115853 91177308-0d34-0410-b5e6-96231b3b80d8
* Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).Jim Grosbach2010-10-064-21/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115845 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-neededJim Grosbach2010-10-062-40/+3
| | | | | | | | "lane" operand modifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115843 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually beJim Grosbach2010-10-062-7/+28
| | | | | | | | pseudo instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115840 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a 'pattern' arg to the ARM PseudoNeonI class.Jim Grosbach2010-10-062-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115831 91177308-0d34-0410-b5e6-96231b3b80d8
* target operand flag values aren't a bitmaskJim Grosbach2010-10-061-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115798 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-0610-41/+330
| | | | | | | | | | | | | | allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
* enhance X86TypeInfo to include information about the encoding andChris Lattner2010-10-061-20/+36
| | | | | | | | | operand kind for immediates. Use these to define a new BinOpRI class and switch AND8/16/32ri over to it. AND64ri32 needs some more refactoring before it can make the switcheroo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115752 91177308-0d34-0410-b5e6-96231b3b80d8
* add a class for _REV nodes.Chris Lattner2010-10-061-19/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115748 91177308-0d34-0410-b5e6-96231b3b80d8
* sink more intelligence into the ITy base class. Now it knowsChris Lattner2010-10-061-12/+21
| | | | | | | | that i8 operations are even and i16,i32,i64 operations have a low opcode bit set (they are odd). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115747 91177308-0d34-0410-b5e6-96231b3b80d8
* refactor things a bit, now the REX_W and OpSize prefix bytes are inferred ↵Chris Lattner2010-10-061-22/+46
| | | | | | from the type info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115745 91177308-0d34-0410-b5e6-96231b3b80d8
* with tblgen suitably extended, we can now get the load node from typeinfo.Chris Lattner2010-10-061-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115744 91177308-0d34-0410-b5e6-96231b3b80d8
* lets go all meta and define new X86 type wrappers that declare the associatedChris Lattner2010-10-062-42/+65
| | | | | | | | gunk that goes along with an MVT (e.g. reg class, preferred load operation, memory operand) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115727 91177308-0d34-0410-b5e6-96231b3b80d8
* introduce a new BinOpRM class and use it to factor AND*rm. This points outChris Lattner2010-10-061-21/+16
| | | | | | | that I need a heavier handed approach to get ultimate factorization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115726 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 placesChris Lattner2010-10-061-8/+8
| | | | | | | where !cast is just as short. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115722 91177308-0d34-0410-b5e6-96231b3b80d8
* replace stuff like:Chris Lattner2010-10-061-15/+11
| | | | | | | | | | | | | | | | let AsmString = !strconcat( !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)), !strconcat("\t", asm)); with: let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm); :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115720 91177308-0d34-0410-b5e6-96231b3b80d8
* allow !strconcat to take more than two operands to eliminateChris Lattner2010-10-053-16/+12
| | | | | | | | | !strconcat(!strconcat(!strconcat(!strconcat Simplify some x86 td files to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115719 91177308-0d34-0410-b5e6-96231b3b80d8
* Comment out fastisel debugging message.Eric Christopher2010-10-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115717 91177308-0d34-0410-b5e6-96231b3b80d8
* associate the instruction suffix letter with the integer gpr Chris Lattner2010-10-052-18/+29
| | | | | | | | register class, and use this to simplify use of BinOpRR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115716 91177308-0d34-0410-b5e6-96231b3b80d8
* introduce a new BinOpRR class, and convert 4 and instructions to use it.Chris Lattner2010-10-051-19/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115715 91177308-0d34-0410-b5e6-96231b3b80d8
* Random cleanup and make the intermediate register in fptosi aEric Christopher2010-10-051-5/+5
| | | | | | | | | 32-bit fp reg, not 64-bit. Fixes SingleSource. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115711 91177308-0d34-0410-b5e6-96231b3b80d8
* Move cmov pseudo instructions to InstrCompiler,Chris Lattner2010-10-052-582/+77
| | | | | | | | | | | | | convert all the rest of the cmovs to the multiclass, with good results: X86InstrCMovSetCC.td | 598 +-------------------------------------------------- X86InstrCompiler.td | 61 +++++ 2 files changed, 77 insertions(+), 582 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115707 91177308-0d34-0410-b5e6-96231b3b80d8
* Use #NAME# to have the CMOV multiclass define things with the same names as ↵Chris Lattner2010-10-054-43/+46
| | | | | | | | | before (e.g. CMOVBE16rr instead of CMOVBErr16). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115705 91177308-0d34-0410-b5e6-96231b3b80d8
* enhance tblgen to support anonymous defm's, use this toChris Lattner2010-10-051-16/+16
| | | | | | | simplify the X86 CMOVmr's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115702 91177308-0d34-0410-b5e6-96231b3b80d8
* convert cmov mr patterns to use a multipattern. Death to redundancyChris Lattner2010-10-051-97/+25
| | | | | | | and verbosity git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
* switch CMOVBE to the multipattern:Chris Lattner2010-10-054-53/+21
| | | | | | | | | 21 insertions(+), 53 deletions(-) Moar change coming before I switch the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115697 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a bug I introduced in r115669, which ended up with MOV64mr_TCChris Lattner2010-10-051-1/+2
| | | | | | | not getting marked as mayStore. This fixes llvm-gcc bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115693 91177308-0d34-0410-b5e6-96231b3b80d8
* add a multiclass for cmov's, but don't start using it yet.Chris Lattner2010-10-051-1/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115692 91177308-0d34-0410-b5e6-96231b3b80d8
* use a multipattern to define setcc instructions:Chris Lattner2010-10-051-173/+27
| | | | | | | | | | X86InstrCMovSetCC.td | 200 ++++++--------------------------------------------- 1 file changed, 27 insertions(+), 173 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115689 91177308-0d34-0410-b5e6-96231b3b80d8
* move SETB pseudos into the same place in InstrCompiler.tdChris Lattner2010-10-052-21/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115686 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace a gross hack (the MOV64ri_alt instruction) with a slightly less Chris Lattner2010-10-053-11/+10
| | | | | | | gross hack (having the asmmatcher handle the alias). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115685 91177308-0d34-0410-b5e6-96231b3b80d8
* distribute the rest of the contents of X86Instr64bit.td out toChris Lattner2010-10-054-331/+264
| | | | | | | the right places. X86Instr64bit.td now dies, long live x86-64! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115669 91177308-0d34-0410-b5e6-96231b3b80d8
* move the rest of the simple 64-bit arithmetic into InstrArithmetic.tdChris Lattner2010-10-052-226/+195
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115663 91177308-0d34-0410-b5e6-96231b3b80d8
* continue moving 64-bit stuff into X86InstrArithmetic.tdChris Lattner2010-10-052-300/+245
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115660 91177308-0d34-0410-b5e6-96231b3b80d8
* Increase the number of bits used internally by the ARM target to represent theJim Grosbach2010-10-052-16/+16
| | | | | | | | addressing mode from four to five. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115645 91177308-0d34-0410-b5e6-96231b3b80d8
* move 64-bit add and adc to InstrArithmetic.Chris Lattner2010-10-052-113/+83
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115632 91177308-0d34-0410-b5e6-96231b3b80d8
* rewrote two addr constraints so that they are only set, not set and then ↵Chris Lattner2010-10-051-321/+343
| | | | | | nestedly cleared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115631 91177308-0d34-0410-b5e6-96231b3b80d8
* split the 32-bit integer arithmetic instructions out to their own file.Chris Lattner2010-10-052-1226/+1246
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115627 91177308-0d34-0410-b5e6-96231b3b80d8
* integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight.Chris Lattner2010-10-052-302/+249
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115608 91177308-0d34-0410-b5e6-96231b3b80d8
* move 32-bit shift and rotates out to their own file.Chris Lattner2010-10-052-555/+579
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115607 91177308-0d34-0410-b5e6-96231b3b80d8
* add new fileChris Lattner2010-10-051-0/+162
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115606 91177308-0d34-0410-b5e6-96231b3b80d8
* move sign and zero extensions out to their own file.Chris Lattner2010-10-052-158/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115605 91177308-0d34-0410-b5e6-96231b3b80d8
* move some instructions from Instr64Bit -> InstrInfo.Chris Lattner2010-10-053-98/+87
| | | | | | | bswap32 doesn't read eflags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115604 91177308-0d34-0410-b5e6-96231b3b80d8
* move CMOV_FR32 and friends to InstrCompiler, since they are Chris Lattner2010-10-054-57/+63
| | | | | | | | | pseudo instructions. Move POPCNT to InstrSSE since they are SSE4 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115603 91177308-0d34-0410-b5e6-96231b3b80d8
* move various pattern matching support goop out of X86Instr64Bit, to liveChris Lattner2010-10-053-87/+70
| | | | | | | with the 32-bit stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115602 91177308-0d34-0410-b5e6-96231b3b80d8
* split conditional moves and setcc's out to their own file.Chris Lattner2010-10-054-814/+838
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115601 91177308-0d34-0410-b5e6-96231b3b80d8
* move string pseudo instructions to InstrCompiler consolidate 64-bit and ↵Chris Lattner2010-10-053-35/+36
| | | | | | 32-bit together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115600 91177308-0d34-0410-b5e6-96231b3b80d8
* move the atomic pseudo instructions out to X86InstrCompiler.tdChris Lattner2010-10-054-393/+388
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-08-04 17:43:26 +0000