| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | The PPC MFCR instruction implicitly uses all 8 of the CR | Dale Johannesen | 2010-05-20 | 5 | -21/+24 |
| * | Strip llvm.dbg.lv also. | Devang Patel | 2010-05-20 | 1 | -0/+6 |
| * | Rename a variable to avoid shadowing. | Dan Gohman | 2010-05-20 | 1 | -2/+3 |
| * | Split DbgVariable. Eventually, variable info will be communicated through fra... | Devang Patel | 2010-05-20 | 2 | -94/+111 |
| * | Minor code simplification. | Dan Gohman | 2010-05-20 | 1 | -4/+4 |
| * | Fix assembly parsing and encoding of the pushf and popf family of | Dan Gohman | 2010-05-20 | 4 | -10/+31 |
| * | Set neverHasSideEffects on 64-bit pushf and popf, for consistency with | Dan Gohman | 2010-05-20 | 1 | -2/+2 |
| * | Move the code for deleting BaseRegs and LSRUses into helper functions, | Dan Gohman | 2010-05-20 | 1 | -5/+22 |
| * | Reduce string trashing. | Benjamin Kramer | 2010-05-20 | 1 | -2/+2 |
| * | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng | 2010-05-20 | 4 | -28/+141 |
| * | Fix typo in comment. | Nick Lewycky | 2010-05-20 | 1 | -2/+2 |
| * | Define the x86 pause instruction. | Dan Gohman | 2010-05-20 | 1 | -0/+4 |
| * | Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it | Dan Gohman | 2010-05-20 | 1 | -1/+2 |
| * | Partial code for emitting thread local bss data. | Eric Christopher | 2010-05-20 | 3 | -0/+9 |
| * | Teach LSR how to cope better with unrolled loops on targets where | Dan Gohman | 2010-05-19 | 1 | -3/+191 |
| * | Optimize away insertelement of an undef value. This shows up in | Bob Wilson | 2010-05-19 | 1 | -0/+4 |
| * | fix rdar://7986634 - match instruction opcodes case insensitively. | Chris Lattner | 2010-05-19 | 1 | -1/+6 |
| * | Enable preserving debug information through post-RA scheduling | Jim Grosbach | 2010-05-19 | 1 | -1/+1 |
| * | Fix the post-RA instruction scheduler to handle instructions referenced by | Jim Grosbach | 2010-05-19 | 1 | -3/+3 |
| * | Code clean up. | Evan Cheng | 2010-05-19 | 1 | -7/+7 |
| * | Revert r104165. | Devang Patel | 2010-05-19 | 2 | -5/+13 |
| * | Add support for partial redefs to the fast register allocator. | Jakob Stoklund Olesen | 2010-05-19 | 1 | -20/+18 |
| * | There is no need to maintain InsnsBeginScopeSet separately. | Devang Patel | 2010-05-19 | 2 | -13/+5 |
| * | Add MachineInstr::readsVirtualRegister() in preparation for proper handling of | Jakob Stoklund Olesen | 2010-05-19 | 1 | -1/+24 |
| * | Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa... | Evan Cheng | 2010-05-19 | 8 | -10/+10 |
| * | TwoAddressInstructionPass doesn't really know how to merge live intervals when | Jakob Stoklund Olesen | 2010-05-19 | 1 | -1/+6 |
| * | llvmc: report an error if a child process segfaults. | Mikhail Glushenkov | 2010-05-19 | 1 | -1/+14 |
| * | When expanding a vector_shuffle, the element type may not be legal and may | Bob Wilson | 2010-05-19 | 1 | -0/+2 |
| * | MC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode(). | Daniel Dunbar | 2010-05-19 | 1 | -0/+1 |
| * | MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same | Daniel Dunbar | 2010-05-19 | 2 | -0/+17 |
| * | MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and | Daniel Dunbar | 2010-05-19 | 1 | -3/+5 |
| * | t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi... | Evan Cheng | 2010-05-19 | 2 | -0/+2 |
| * | Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable. | Evan Cheng | 2010-05-19 | 1 | -12/+4 |
| * | MC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate. | Daniel Dunbar | 2010-05-19 | 1 | -9/+50 |
| * | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng | 2010-05-19 | 5 | -35/+37 |
| * | Target instruction selection should copy memoperands. | Evan Cheng | 2010-05-19 | 1 | -3/+11 |
| * | MC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, to | Daniel Dunbar | 2010-05-19 | 1 | -6/+8 |
| * | Mark a few more pattern-less instructions with neverHasSideEffects. This is e... | Evan Cheng | 2010-05-19 | 3 | -0/+12 |
| * | Add a comment explaining why this code uses Append mode. | Dan Gohman | 2010-05-19 | 1 | -0/+4 |
| * | Intrinsics which do a vector compare (results are all zero or all ones) are m... | Evan Cheng | 2010-05-19 | 1 | -6/+75 |
| * | Factor out the code for picking integer arithmetic with immediate | Dan Gohman | 2010-05-19 | 1 | -15/+32 |
| * | Add a comment. | Dan Gohman | 2010-05-18 | 1 | -0/+1 |
| * | Fix the predicate which checks for non-sensical formulae which have | Dan Gohman | 2010-05-18 | 1 | -4/+5 |
| * | Factor out the code for recomputing an LSRUse's Regs set after some | Dan Gohman | 2010-05-18 | 1 | -17/+40 |
| * | Fix a crash when debugging the coalescer. DebugValue instructions are not | Bob Wilson | 2010-05-18 | 1 | -4/+13 |
| * | Factor out code for estimating search space complexity into a helper | Dan Gohman | 2010-05-18 | 1 | -22/+26 |
| * | Add some more debug output. | Dan Gohman | 2010-05-18 | 1 | -0/+1 |
| * | Factor out the code for deleting a formula from an LSRUse into | Dan Gohman | 2010-05-18 | 1 | -4/+9 |
| * | Make some debug output more informative. | Dan Gohman | 2010-05-18 | 1 | -2/+3 |
| * | Print an error message in Formula::print if the HasBaseReg flag | Dan Gohman | 2010-05-18 | 1 | -0/+7 |
